mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-09 17:11:42 +00:00
spring: set boost PWM frequency to 32Khz
Push the PWM frequency outside the audio band to avoid audible whining. Also fix the off-by-one in the PWM frequency computation. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=spring BUG=chrome-os-partner:17583 TEST=manual : probe the PWM output with a scope. Change-Id: Ie1c8c5aed72bef46c8bac16c1bf3007e8e9573bb Reviewed-on: https://gerrit.chromium.org/gerrit/45584 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
committed by
ChromeBot
parent
05f496759f
commit
f2df09d602
@@ -21,7 +21,7 @@
|
||||
#include "tsu6721.h"
|
||||
#include "util.h"
|
||||
|
||||
#define PWM_FREQUENCY 10000 /* Hz */
|
||||
#define PWM_FREQUENCY 32000 /* Hz */
|
||||
|
||||
/* Console output macros */
|
||||
#define CPUTS(outstr) cputs(CC_USBCHARGE, outstr)
|
||||
@@ -116,14 +116,14 @@ static void board_ilim_use_pwm(void)
|
||||
STM32_TIM_CR1(3) = 0x0000;
|
||||
|
||||
/*
|
||||
* CPU_CLOCK / PSC determines how fast the counter operates.
|
||||
* CPU_CLOCK / (PSC + 1) determines how fast the counter operates.
|
||||
* ARR determines the wave period, CCRn determines duty cycle.
|
||||
* Thus, frequency = CPU_CLOCK / PSC / ARR.
|
||||
* Thus, frequency = CPU_CLOCK / (PSC + 1) / ARR.
|
||||
*
|
||||
* Assuming 16MHz clock and ARR=100, PSC needed to achieve PWM_FREQUENCY
|
||||
* is: PSC = CPU_CLOCK / PWM_FREQUENCY / ARR
|
||||
* is: PSC = CPU_CLOCK / PWM_FREQUENCY / ARR - 1
|
||||
*/
|
||||
STM32_TIM_PSC(3) = CPU_CLOCK / PWM_FREQUENCY / 100; /* pre-scaler */
|
||||
STM32_TIM_PSC(3) = CPU_CLOCK / PWM_FREQUENCY / 100 - 1; /* pre-scaler */
|
||||
STM32_TIM_ARR(3) = 100; /* auto-reload value */
|
||||
STM32_TIM_CCR1(3) = 100; /* duty cycle */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user