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Remove DDR shunt signal, which is no longer present on proto1

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Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST=power system on; should still boot

Change-Id: I2e6c1f1cb4ffabf37d3113faca900da17c1353e9
This commit is contained in:
Randall Spangler
2012-04-13 14:12:45 -07:00
parent 335af85983
commit f6d9b19358
3 changed files with 0 additions and 6 deletions
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1
board/link/board.c
View File

@@ -90,7 +90,6 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
{"PCH_RSMRSTn", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL},
{"PCH_SMIn", LM4_GPIO_F, (1<<4), GPIO_OUT_HIGH, NULL},
{"PCH_SUSACKn", LM4_GPIO_F, (1<<3), GPIO_OUT_HIGH, NULL},
{"SHUNT_1_5V_DDR", LM4_GPIO_F, (1<<6), GPIO_OUT_HIGH, NULL},
{"TOUCHSCREEN_RESETn", LM4_GPIO_B, (1<<0), GPIO_OUT_LOW, NULL},
{"USB1_CTL1", LM4_GPIO_E, (1<<2), GPIO_OUT_LOW, NULL},
{"USB1_CTL2", LM4_GPIO_E, (1<<3), GPIO_OUT_LOW, NULL},

2
board/link/board.h
View File

@@ -155,8 +155,6 @@ enum gpio_signal {
GPIO_PCH_RSMRSTn, /* Reset PCH resume power plane logic */
GPIO_PCH_SMIn, /* System management interrupt to PCH */
GPIO_PCH_SUSACKn, /* Acknowledge PCH SUSWARN# signal */
GPIO_SHUNT_1_5V_DDR, /* Shunt +1.5V_DDR (Proto0 only) */
/* TODO: remove once we move to proto1 */
GPIO_TOUCHSCREEN_RESETn, /* Reset touch screen (Proto1+) */
GPIO_USB1_CTL1, /* USB charger port 1 CTL1 output */
GPIO_USB1_CTL2, /* USB charger port 1 CTL2 output */

3
common/x86_power.c
View File

@@ -266,7 +266,6 @@ int x86_power_init(void)
gpio_set_level(GPIO_ENABLE_TOUCHPAD, 0);
gpio_set_level(GPIO_TOUCHSCREEN_RESETn, 0);
gpio_set_level(GPIO_ENABLE_1_5V_DDR, 0);
gpio_set_level(GPIO_SHUNT_1_5V_DDR, 1);
gpio_set_level(GPIO_PCH_RSMRSTn, 0);
gpio_set_level(GPIO_PCH_DPWROK, 0);
}
@@ -330,7 +329,6 @@ void x86_power_task(void)
case X86_S5S3:
/* Turn on power to RAM */
gpio_set_level(GPIO_SHUNT_1_5V_DDR, 0);
gpio_set_level(GPIO_ENABLE_1_5V_DDR, 1);
/* Enable touchpad power and take touchscreen out of
@@ -410,7 +408,6 @@ void x86_power_task(void)
/* Turn off power to RAM */
gpio_set_level(GPIO_ENABLE_1_5V_DDR, 0);
gpio_set_level(GPIO_SHUNT_1_5V_DDR, 1);
state = X86_S5;
break;