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stm32: Squeeze fakewp backup register for VbNvContext
We squeeze 2 bytes out of fakewp backup register so that we would have full 16 bytes for VbNvContext. As fakewp will go away real soon and it needs just 1 bits, we move it to saved reset flags register's most significant bit, which is currently unused. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> BRANCH=snow BUG=chrome-os-partner:10660,13094 TEST=manual Make sure reset flags are still preserved: 1. reset with keyboard. flags -> reset-pin 2. trigger watchdog reset. flags -> reset-pin watchdog 3. 'reboot soft preserve' flags -> reset-pin watchdog soft 4. trigger watchdog reset. flags -> reset-pin watchdog 5. 'reboot soft' flags -> reset-pin soft Make sure fakewp is still preserved: 1. 'flashinfo' -> no flags 2. 'fakewp 1' -> 'wp_gpio_asserted' 3. 'flashwp enable' -> 'wp_gpio_asserted ro_at_boot' 4. 'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now' 5. 'fakewp 0' -> 'ro_at_boot ro_now' 6. 'reboot' -> 'ro_at_boot' 7. 'fakewp 1' -> 'wp_gpio_asserted ro_at_boot' 8. 'flashwp rw' -> 'wp_gpio_asserted ro_at_boot rw_at_boot' 9. 'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now rw_at_boot rw_now' 10.'flashwp disable'-> error 7 11.'flashwp norw' -> 'wp_gpio_asserted ro_at_boot ro_now rw_now' 12.'reboot' -> 'wp_gpio_asserted ro_at_boot ro_now' Change-Id: Ibb7dc8aa224d3226bbaac217e494565e448b5858 Reviewed-on: https://gerrit.chromium.org/gerrit/32041 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
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@@ -9,16 +9,16 @@
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#include "registers.h"
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#include "system.h"
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#include "task.h"
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#include "util.h"
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#include "version.h"
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#include "watchdog.h"
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/* TODO: Fake WP is stored at most significant bit of saved reset flags to save
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* space. Remove it when we have real write protect pin */
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enum bkpdata_index {
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BKPDATA_INDEX_SCRATCHPAD, /* General-purpose scratchpad */
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BKPDATA_INDEX_SAVED_RESET_FLAGS,/* Saved reset flags */
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BKPDATA_INDEX_FAKE_WP, /* Fake write-protect pin */
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/* TODO: Remove this when we have real
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* write protect pin.
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*/
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};
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@@ -55,12 +55,15 @@ static void check_reset_cause(void)
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uint32_t raw_cause = STM32_RCC_CSR;
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uint32_t pwr_status = STM32_PWR_CSR;
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uint32_t fake_wp = flags & 0x8000;
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flags &= ~0x8000;
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/* Clear the hardware reset cause by setting the RMVF bit */
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STM32_RCC_CSR |= 1 << 24;
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/* Clear SBF in PWR_CSR */
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STM32_PWR_CR |= 1 << 3;
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/* Clear saved reset flags */
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bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0);
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bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0 | fake_wp);
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if (raw_cause & 0x60000000) {
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/* IWDG or WWDG
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@@ -140,9 +143,16 @@ void system_reset(int flags)
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{
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uint32_t save_flags = 0;
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uint32_t fake_wp =
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bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000;
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/* Disable interrupts to avoid task swaps during reboot */
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interrupt_disable();
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/* TODO: Check if a collision between reset flags and fake wp occurred.
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* Remove this when we have real write protect pin. */
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ASSERT(!(system_get_reset_flags() & 0x8000));
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/* Save current reset reasons if necessary */
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if (flags & SYSTEM_RESET_PRESERVE_FLAGS)
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save_flags = system_get_reset_flags() | RESET_FLAG_PRESERVED;
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@@ -154,7 +164,7 @@ void system_reset(int flags)
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if (flags & SYSTEM_RESET_HARD)
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save_flags |= RESET_FLAG_HARD;
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bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags);
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bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags | fake_wp);
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if (flags & SYSTEM_RESET_HARD) {
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/* Ask the watchdog to trigger a hard reboot */
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@@ -210,12 +220,22 @@ const char *system_get_chip_revision(void)
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/* TODO: crosbug.com/p/12036 */
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int system_set_fake_wp(int val)
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{
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return bkpdata_write(BKPDATA_INDEX_FAKE_WP, (uint16_t)val);
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uint16_t flags = bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS);
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if (val)
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flags |= 0x8000;
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else
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flags &= ~0x8000;
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return bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, flags);
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}
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/* TODO: crosbug.com/p/12036 */
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int system_get_fake_wp(void)
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{
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return bkpdata_read(BKPDATA_INDEX_FAKE_WP);
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if (bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000)
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return 1;
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else
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return 0;
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}
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