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gma: Implement Ivy Bridge VGA plane workaround

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It's a documented requirement, even though it doesn't seem necessary.

Change-Id: Id4f579c1ca34633ee00c771b39e6ff45cdcfbf69
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17277
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Nico Huber
2016-11-07 15:08:26 +01:00
committed by Nico Huber
parent 3675db58aa
commit fbb4220155
3 changed files with 20 additions and 2 deletions
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1
common/hw-gfx-gma-config.ads.template
View File

@@ -49,6 +49,7 @@ is
Has_Plane_Control : constant Boolean := CPU >= Skylake;
Has_DSP_Linoff : constant Boolean := CPU <= Ivybridge;
Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell;
VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge;
----- Panel power: -----
Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge;

16
common/hw-gfx-gma-pipe_setup.adb
View File

@@ -25,6 +25,11 @@ use type HW.GFX.GMA.Registers.Registers_Invalid_Index;
package body HW.GFX.GMA.Pipe_Setup is
ILK_DISPLAY_CHICKEN1_VGA_MASK : constant := 7 * 2 ** 29;
ILK_DISPLAY_CHICKEN1_VGA_ENABLE : constant := 5 * 2 ** 29;
ILK_DISPLAY_CHICKEN2_VGA_MASK : constant := 1 * 2 ** 25;
ILK_DISPLAY_CHICKEN2_VGA_ENABLE : constant := 0 * 2 ** 25;
DSPCNTR_ENABLE : constant := 1 * 2 ** 31;
DSPCNTR_GAMMA_CORRECTION : constant := 1 * 2 ** 30;
DSPCNTR_DISABLE_TRICKLE_FEED : constant := 1 * 2 ** 14;
@@ -416,6 +421,17 @@ package body HW.GFX.GMA.Pipe_Setup is
end if;
if Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET then
if Config.VGA_Plane_Workaround then
Registers.Unset_And_Set_Mask
(Register => Registers.ILK_DISPLAY_CHICKEN1,
Mask_Unset => ILK_DISPLAY_CHICKEN1_VGA_MASK,
Mask_Set => ILK_DISPLAY_CHICKEN1_VGA_ENABLE);
Registers.Unset_And_Set_Mask
(Register => Registers.ILK_DISPLAY_CHICKEN2,
Mask_Unset => ILK_DISPLAY_CHICKEN2_VGA_MASK,
Mask_Set => ILK_DISPLAY_CHICKEN2_VGA_ENABLE);
end if;
Registers.Unset_And_Set_Mask
(Register => Registers.VGACNTRL,
Mask_Unset => VGA_CONTROL_VGA_DISPLAY_DISABLE or

5
common/hw-gfx-gma-registers.ads
View File

@@ -67,7 +67,7 @@ is
GAB_CTL_REG,
VGACNTRL,
FUSE_STATUS,
QUIRK_42004,
ILK_DISPLAY_CHICKEN2,
DSPCLK_GATE_D,
FBA_CFB_BASE,
FBC_CTL,
@@ -965,7 +965,7 @@ is
VCS_PP_DCLV_LOW => 16#01_2228# / Register_Width,
BCS_PP_DCLV_HIGH => 16#02_2220# / Register_Width,
BCS_PP_DCLV_LOW => 16#02_2228# / Register_Width,
QUIRK_42004 => 16#04_2004# / Register_Width,
ILK_DISPLAY_CHICKEN2 => 16#04_2004# / Register_Width,
UCGCTL1 => 16#00_9400# / Register_Width,
UCGCTL2 => 16#00_9404# / Register_Width,
MBCTL => 16#00_907c# / Register_Width,
@@ -1029,6 +1029,7 @@ is
DP_AUX_DATA_A_3 : constant Registers_Index := DDI_AUX_DATA_A_3;
DP_AUX_DATA_A_4 : constant Registers_Index := DDI_AUX_DATA_A_4;
DP_AUX_DATA_A_5 : constant Registers_Index := DDI_AUX_DATA_A_5;
ILK_DISPLAY_CHICKEN1 : constant Registers_Index := FUSE_STATUS;
---------------------------------------------------------------------------