Commit Graph

775 Commits

Author SHA1 Message Date
Nicolas Boichat
76927bdc5a stm32/usb: Add HOOK_USB_PM_CHANGE, called when USB is resumed/suspended
In particular, this will allow touchpad driver and keyboard matrix
scanning to be powered off/disabled when the USB interface is
disabled without setting the remote wake feature
(USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be
ignored anyway.

BRANCH=none
BUG=b:72683995
TEST=With next CLs, touchpad and keyboard matrix scanning are disabled
     when lid is closed.

Change-Id: I3750bfaf8c31cde075adf9da4fef39753b8981c5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897067
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-02-02 10:17:30 -08:00
Wei-Han Chen
b245e71e82 stm32: add usb_isochronous
Templates for USB isochronous implementation.  Current implementation
only supports TX transmit.  Example of usage can be found in CL:803414.

Basically, declare an USB isochronous interface by

USB_ISOCHRONOUS_CONFIG_FULL(<NAME>,
                            <INTERFACE_NUM>,
                            <USB_CLASS>,
                            <USB_SUBCLASS>,
                            <SUB_PROTOCOL>,
                            <USB_STR_FOR_INTERFACE_NAME>,
                            <USB_EP_NUM>,
                            <PACKET_SIZE>,
                            <TX_CALLBACK>,
                            <SET_INTERFACE>)

where <PACKET_SIZE> is size of each USB packet, <TX_CALLBACK> is called
when USB hardware has completed a packet.  The buffer that USB is not
currently using will be passed to <TX_CALLBACK>, allow applications to
write next packet to it.

When a SET_INTERFACE packet is received, <SET_INTERFACE> will be called
with bAlternateSetting and bInterfaceNumber.

We will declare interface descriptor with bAlternateSetting = 0 and 1
for you, if you need more alternate settings, you need to declare by
yourself.

BUG=b:70482333
TEST=manually on reworked staff board
Signed-off-by: Wei-Han Chen <stimim@google.com>

Change-Id: Ic6d41da6ddd7945edf0bdfff55ede38a97661783
Reviewed-on: https://chromium-review.googlesource.com/818853
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-01-31 08:29:46 -08:00
Shawn Nematbakhsh
8d29b3dae7 stm32: Fix bkpdata accounting
stm32f0 has 20 bytes (not 20 words) of VBAT-backed RAM. Make more
efficient use of our limited storage to prevent trying to use storage
that doesn't exist.

BUG=b:71333840
BRANCH=None
TEST=Negotiate PD, run "reboot" on scarlet EC console, verify reset path
is taken in pd_partner_port_reset().

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie4c303b74a1b82b84ec971cdcc19c2b21a0032e7
Reviewed-on: https://chromium-review.googlesource.com/885461
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-01-30 14:54:17 -08:00
Wei-Han Chen
9a7e82bac8 stm32: make half-duplex SPI works on STM32F0
According to RM0091, steps for using DMA for SPI peripheral should be:

1. enable DMA RX / TX
2. enable SPI
3. wait for DMA to complete
4. disable DMA RX / TX
5. disable SPI

BUG=b:70482333
TEST=tested on reworked staff (half-duplex)
TEST=tested elm (full-duplex)

Change-Id: I095409195cd1e0379995f0bfa6605c2e1a0dfd3c
Reviewed-on: https://chromium-review.googlesource.com/853715
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-01-25 00:15:48 -08:00
Nicolas Boichat
9ef3e91bdd stm32/usb: Add logic to detect stuck controller in usb_wake
When we tried to go back to sleep immediately after receiving a
spurious USB resume event, the controller would get stuck in an
unrecoverable state. Hopefully we fixed the resume logic, but
this code would catch other cases, and recover the base.

BRANCH=none
BUG=b:35775088
BUG=b:67766202
BUG=b:71688150
TEST=With badly implemented resume logic (e.g. call
     usb_resume_deferred directly from usb_resume), with USB
     autosuspend enabled on soraka, short D+/D- lines.
     Next wake event from staff shows "USB stuck", and then
     USB interface recovers.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I7463a37682723be195bd6a72ea5d76c21bb6cb9a
Reviewed-on: https://chromium-review.googlesource.com/868094
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-01-18 10:11:49 -08:00
Nicolas Boichat
0270e9db62 stm32/usb: Handle spurious wakes in usb_resume
Sometimes, usb_resume gets called, but the D+/D- lines do not
indicate an actual resume event (e.g. during ESD discharge).

Reference manual tells we should go back to sleep if state is 10 or
11. However, setting FSUSP and LP_MODE in this interrupt routine
seems to lock the USB controller (see b/35775088 and b/71688150).
Instead, we do it in a deferred routine. The host must assert the
reset condition for 20ms, so reading D+/D- after ~3ms should be safe
(there is no chance we end up sampling during a bus transaction).

BRANCH=none
BUG=b:35775088
BUG=b:67766202
BUG=b:71688150
TEST=On staff, with USB autosuspend enabled on soraka, short
     D+/D- lines, which causes a spurious wake event. After that
     remote wake-up still works.
TEST=Repeat test with ESD discharge.
TEST=Repeat test with plugging/unplugging of USB-C monitor.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I0f2697d1fa5b68356fd8a4fc16eaab5eadad9086
Reviewed-on: https://chromium-review.googlesource.com/868093
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-01-18 10:11:48 -08:00
Nicolas Boichat
6432c52a72 stm32/usb: usb_wake: Update STM32_USB_CNTR with interrupts off
STM32_USB_CNTR may be written from both interrupt context, and
usb_wake (not necessarily in interrupt context). Let's disable
interrupts to make sure the operation is atomic.

BRANCH=none
BUG=b:35775088
BUG=b:67766202
BUG=b:71688150
TEST=Flash hammer, hammer can wake from USB autosuspend

Change-Id: I9c2a3259902ecb759a6d0d89c7746c7aa72ae73d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/744282
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-01-17 23:37:26 -08:00
Vincent Palatin
47c7e189b9 stm32: add SPI slave support for STM32H7
Update the host command support on the STM32 SPI slave for the STM32H7
silicon.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=b:67081508
TEST=with a servo v2 connected to ZerbleBarn,
send host commands v3 through the servo FTDI SPI interface.

Change-Id: I26ff4b6a3a45e446cd16e9da43c6932c24c37256
Reviewed-on: https://chromium-review.googlesource.com/839864
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2018-01-12 14:31:07 -08:00
Vincent Palatin
d56195cfdb stm32: add SPI master for STM32H7
Add the driver for the new silicon used in STM32H7 SPI controller,
including its bad errata when used with DMA.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, do finger image acquisition on the SPI fingerprint
sensor.

Change-Id: Ieaf4a09e961d3e0ef78b58886c409a7dfb63aaf3
Reviewed-on: https://chromium-review.googlesource.com/836617
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2018-01-08 17:22:48 -08:00
Vincent Palatin
e24a3953c2 stm32: Add STM32H7 family
Start adding support for the STM32H7 family of device and the first
available one the STM32H743.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=b:67081508
TEST=manual, run on stm32h743i-eval and zerblebarn boards
get a stable serial console.

Change-Id: I9ae10f0d843e5318451713c21ed22d455a23758c
Reviewed-on: https://chromium-review.googlesource.com/806168
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2018-01-08 05:41:23 -08:00
Vincent Palatin
90d735c3c3 stm32: re-factor registers.h addresses
Move all the peripheral blocks base addresses in a common block rather
than spread among the register definitions.
This will help making a cleaner STM32H7 implementation whose base
addresses are all different from other families.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=b:67081508
TEST=compare all the ec.bin generated by 'make buildall' and verify
they are bit-identical with and without the change.

Change-Id: I52cafd2f3c9145dbcd585166df3fc78e38573bb4
2017-12-25 17:17:26 -08:00
Nicolas Boichat
bbb40ce21d consumer: Remove flush operation
Nobody is calling the flush function for consumer_ops structure,
so let's remove it to save flash space, until we find a use for it.

CQ-DEPEND=CL:*529221
BRANCH=none
BUG=chromium:795624
TEST=make buildall -j, saves from 40 to 128 bytes on some boards.

Change-Id: Iad18b30f419ccebc54a90914ec46da84b8d19601
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/826905
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-18 20:32:58 -08:00
Nicolas Boichat
575c03f31c chip/stm32: Add support for half-duplex UART
BRANCH=none
BUG=b:65697962
TEST=make BOARD=wand -j

Change-Id: I2af4acb5cce6da6ce2f01d6d60cf5e806c9a4ed2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/821891
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-15 05:32:29 -08:00
Wei-Ning Huang
4ced1d7d6a chip/stm32/usb_hid_keyboard: add dynamic backlight detection support
In order to make a single hammer image support both base with and
without keyboard backlight. We need a way to dynamically determine if
backlight is present, and send the correct HID descriptors. This is done
through declaring two HID descriptors and return the correct one
depending on whether or not the backlight is present.

BRANCH=none
BUG=b:67722756
TEST=On reworked board with pull-down on backlight pin,
     USB descriptor has backlight HID report descriptor, and is
     functional.
TEST=On old board with both pull-up and pull-down (equivalent to
     having pull-up only, i.e. no backlight)
     USB descriptor does not have backlight HID report descriptor

Change-Id: Ie3eac9b3d4cd749308ccfb96a7db469701f9793b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770600
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-12 03:57:19 -08:00
Nicolas Boichat
e3c1e2265c stm32/usb: Patching framework for USB descriptors
In some cases, we want to be able to dynamically modify a few bytes
in the USB descriptor (in our case, length of referenced items),
but it could also be other things like flags.

These 2 new functions allow to keep all the USB descriptor in flash, and
modify these few bytes before writing them in the USB buffer.

BRANCH=none
BUG=b:37447752
TEST=Flash hammer, USB descriptors are valid.

Change-Id: I8624255fa43f52a0aaa21d20e963f3974f236912
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771057
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-12 03:57:19 -08:00
Shawn Nematbakhsh
01e43230ca stm32f0 / stm32f3: rtc: Fix register <-> time conversion
us_to_rtcss() could return an invalid value when us approached 1 sec
due to precision loss in the divisor. Change the calculation order to
divide last to eliminate precision loss.

BUG=b:68185182
BRANCH=None
TEST=On scarlet, Verify hw clock closely matches reality w/ low-power idle.
Verify EC doesn't watchdog for 5 hours in S5 / G3 w/ low-power idle. Verify
suspend-stress-test still succeeds to wake device on alarm.

Change-Id: Id40797dd4291e94a54a09bbbdbc1a7f7a00a01b4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/818332
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-11 12:47:48 -08:00
Shawn Nematbakhsh
316a8cb398 stm32: Add proper flash erase timeout
stm32f0 / f3 can take up to 40ms to erase a single sector of flash. Also
add a note about instruction fetch being blocked on flash operation
completion.

TEST=`make buildall -j`
BUG=b:70193071
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Icb6c199a975b31f4fa7c73ceb6ad8ec06150abb1
Reviewed-on: https://chromium-review.googlesource.com/815276
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-12-08 20:37:25 -08:00
Philip Chen
e2a9ede352 chip/stm32/clock: Handle illegal alarm timeout gracefully
Even if we set the rtc alarm timeout for more than 86400 secs,
we should not crash the system.

BUG=chromium:768042
BRANCH=none
TEST=on AP console, do 'ectool rtcsetalarm 99999' and
then see 'EC result 3 (INVALID_PARAM)' without crash.

Change-Id: Ic0fa92ff101bce1f4791221c4e1eadaf7a005355
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/807624
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-12-06 17:30:47 -08:00
Vincent Palatin
c2bafec03c stm32: update USB version for BOS descriptors
Bump the USB version (aka bcdUSB) for BOS descriptors to 2.1 (rather
than 2.01) to be compatible with Chrome implementation.

The CL 664813 was intending to do this, but I screw up and only changed
it for chip/g and let chip/stm32 unchanged :
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/664813

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=twinkie
BUG=none
TEST=manual, plug an updated Twinkie and see the WebUSB pop-up on
Chrome.

Change-Id: Ia81fa91b6d7790af6f6683c0da7ca1d794b4e4df
Reviewed-on: https://chromium-review.googlesource.com/789934
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
2017-11-30 11:48:57 -08:00
Furquan Shaikh
c9cd870600 host_events: Bump up host events and masks to 64-bit
With the upcoming change to add a new command to get/set/clear host
events and masks, it seems to be the right time to bump up the host
events and masks to 64-bit. We are already out of available host
events. This change opens up at least 32 bits for new host events.

Old EC commands to operate on host events/masks will still deal with
lower 32-bits of the events/mask. On the other hand, the new command
being added will take care of the entire 64-bit events/masks. This
ensures that old BIOS and kernel versions can still work with the
newer EC versions.

BUG=b:69329196
BRANCH=None
TEST=make -j buildall. Verified:
1. hostevent set 0x4000 ==> Sets correct bit in host events
2. hostevent clear 0x4000 ==> Clears correct bit in host events
3. Kernel is able to query and read correct host event bits from
EC. Verified using evtest.
4. Coreboot is able to read correct wake reason from EC. Verified
using mosys eventlog list.

Change-Id: Idcb24ea364ac6c491efc2f8dd9e29a9df6149e07
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-21 18:53:35 -08:00
Shawn Nematbakhsh
204880575d stm32f0: i2c: Fix dropped Rx byte in TCPCI slave mode
If the i2c master sends a stop condition before we've buffered the last
Rx byte (eg. due to higher than normal i2c interrupt latency) then we
don't want to drop the last byte on the floor, it's still meaningful.

BUG=b:65711378
BRANCH=glados
TEST=Spam TCPC_REG_ROLE_CTRL commands from caroline to caroline_pd,
verify no errors are observed on either side for 12,000,000
transactions.

Change-Id: I0c4a81d97315cff553a5448c0940746e1ef0ed2c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771936
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-11-15 20:21:06 -08:00
Moritz Fischer
2e7a6bc39e stm32: jtag: Enable clock to debug module on stm32f0x
Enables the clock to the debug module so that when connecting via SWD
debugger the watchdog and timers are stopped.

BRANCH=master
TEST=Build on stm32f0x board and connect via SWD, observe no watchdog
reset.

Change-Id: Ic40b16c09acc5920da2c1a39e9391a6b21849d2c
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: https://chromium-review.googlesource.com/765290
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-11-15 00:39:52 -08:00
Nicolas Boichat
7501654d20 chip/stm32/usart: Add flags to usart_config
Allows setting TXINV/RXINV bits.

BRANCH=none
BUG=b:65697962
TEST=make BOARD=wand -j

Change-Id: Ib1bb290cd9758c53b98c8fc1ca1a9369c8cff39e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/694561
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-10-18 08:30:16 -07:00
Philip Chen
982f2bbfab chip/stm32/clock: Optionally use LSE as RTCCLK
The default RTCCLK comes from LSI, which can vary from 30kHz to 60kHz.
To use stm32 RTC for applications requiring accurate timing, let's setup
LSE (a more accurate clock source) as RTCCLK.

Also fix a typo in register.h as 'BCDR' should be 'BDCR' globally.

BUG=b:63908519
BRANCH=none
TEST=boot scarlet rev1 and wait for an hour,
confirm rtc time == kernel system time.

Change-Id: If4728bdd3b6384316e5337004a49c172eaec869d
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/679601
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-10-11 13:19:33 -07:00
Philip Chen
93a2528197 chip/stm32/clock: Don't wake up the host when the host resets rtc
The way AP resets ec rtc alarm is to set rtc alarm wake time in 0 sec.
In current implementation, this still sets host_rtc_alarm_set.
...So when rtc irq is triggered next time, it wakes up the host even if
the alarm is not set by the host.
Let's fix it.

BUG=b:66971951, b:67379662
BRANCH=none
TEST='powerd_dbus_suspend' and see the host stay in suspend mode

Change-Id: I1e14f669e3d887874548813c7c5b4d21d80bc62e
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/699657
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-10-06 00:21:29 -07:00
Philip Chen
29dc221f98 chip/stm32/clock: Allow the host to reset rtc alarm
When the host sets rtc alarm wake time = 0, it wants
to reset and disable the alarm.

Also, align the implementation in npcx with that in stm32
to check both delay_s and delay_us.

BUG=b:66971951, b:63908519
BRANCH=none
TEST='ectool rtcsetalarm 3'. After alarm goes off, run
'ectool rtcgetalarm' and then see 'Alarm not set'.

Change-Id: I693f1c72cba492e837891c716f79e2aa4da59b2a
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/691256
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
2017-10-02 23:28:28 -07:00
Philip Chen
78f485465f chip/stm32/clock: Wakeup AP when rtc alarm goes off
BUG=b:63908519
BRANCH=none
TEST='powerd_dbus_suspend --wakeup_timeout=10' and see
AP do S0->S3(10 secs)->S0

Change-Id: I35e248627e2f3b68b0ed3f27d6bae65eb73a745b
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/674054
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-09-28 15:59:05 -07:00
Philip Chen
884b790a65 chip/stm32/clock: Incorporate RTC date register
The current stm32 rtc driver only uses RTC_TR and RTC_SSR.
So we son't be able to use rtc for applications which need
time > 24 hours.

To support such applications, this patch adds operations
for RTC date register (RTC_DR).

BUG=b:63908519
CQ-DEPEND=CL:666985
BRANCH=none
TEST=manually with 'ectool rtcset/rtcset' and '/sys/class/rtc/rtc0',
verify the conversion between calendar time and Unix epoch time works.

Change-Id: Iacd5468502e4417a70880d7239ca5e03353d9469
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/659337
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-09-27 19:03:03 -07:00
Vincent Palatin
77f011206c Add WebUSB descriptor support
The WebUSB specification defines a specific Platform Descriptor in the
Binary Object Store:
https://wicg.github.io/webusb/#webusb-platform-capability-descriptor
This descriptor provides a special 'Landing page' URL to the host
browser and associated privileges for it.

Bump the USB version for BOS descriptors to 2.1 to be compatible with
Chrome implementation.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=none
BRANCH=twinkie
TEST=manual: on Twinkie (chip/stm32) and HG proto2 (chip/g), enumerate
WebUSB descriptors with lsusb and connect to a WebUSB page in Chrome
R61+.

Change-Id: I7211ab554f4a6c156c1e8e79a3d9f0d6644217c6
Reviewed-on: https://chromium-review.googlesource.com/664813
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-09-22 10:18:50 -07:00
Shawn Nematbakhsh
0898c7a63a cleanup: Remove jtag_pre_init()
Use our newly-created chip_pre_init() for doing JTAG initialization.

BUG=chromium:747629
BRANCH=None
TEST=`make buildall -j`

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ic5771895a214a9f1aa9bd289eef576f52adf973f
Reviewed-on: https://chromium-review.googlesource.com/629676
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-09-07 15:01:05 -07:00
Wei-Ning Huang
235d9a18c1 chip/stm32/usb_hid_keyboard: implement keyboard backlight control
Implement keyboard backlight control through HID output report. One
could enable CONFIG_USB_HID_KEYBOARD_BACKLIGHT to enable keyboard
backlight support for a given board. Target board must implement the
`void board_set_backlight(int brightness)` function in order correctly
set backlight.

BRANCH=none
BUG=b:37971411,b:63364143
TEST=with follow up CLs
     1. `make BOARD=hammer -j`
     2. `echo 10 > /sys/class/leds/hammer\:\:kbd_backlight/brightness`
        console shows 'Keyboard backlight set to 10%'

Change-Id: Ibeff510a0d996ddebf61b54ed6b500b02c35564a
Signed-off-by: Wei-Ning Huang <wnhuang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/586348
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-09-01 12:39:19 -07:00
Philip Chen
e505cb3662 chip/stm32/clock: Support RTC console/host commands
Add the driver for RTC console/host commands on stm32f0.

BUG=b:63908519
BRANCH=none
TEST=on scarlet, manually test 'rtc'/'rtc set' on ec console and
'ectool rtcget/rtcset/rtcgetalarm/rtcsetalarm' on ap console.

Change-Id: I71035c91ed69fa5f65448618ff8bd1a37427eaad
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/627637
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
2017-08-23 12:19:08 -07:00
Nicolas Boichat
940b88754c chip/stm32/i2c-stm32f0: Further adjust 400kHz setting (48Mhz clock source)
It turns out SCLH = 0x5 is still a little fast (411 kHz on hammer),
let's update it to 0x6.

See 5e6f9a2b38 "chip/stm32/i2c-stm32f0: Adjust 400kHz setting (48Mhz clock source)"
for details.

BRANCH=none
BUG=b:36172041
TEST=Measure I2C speed to be <400 kHz on hammer

Change-Id: I2b5acc532963c407144b8e2a7786d3e2302192d3
Reviewed-on: https://chromium-review.googlesource.com/625507
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Toshak Singhal <toshak@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-23 06:23:26 -07:00
Nicolas Boichat
9c1cf6def5 usb_hid_keyboard: Add support for boot protocol report
In boot protocol mode, we must only send the first 8 bytes of the
report. Also, go back to report mode on USB reset.

When mode is changed, we immediately toggle keyboard endpoint,
to make sure the appropriately sized packet is sent (otherwise,
a longer packet packet will be sent once, which confuses AP
firmware).

BRANCH=none
BUG=b:62004286
BUG=b:64953295
TEST=Flash hammer, check that keyboard works at firmware screen
     and in the OS, and that new key works in OS.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>

Change-Id: If7d6aa6c2dd127b9de34fc93d06bc0dd6e6128a2
Reviewed-on: https://chromium-review.googlesource.com/627344
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2017-08-23 00:04:07 -07:00
Vincent Palatin
3cbdff8b1b stm32: add embryonic support for STM32F76x
The STM32F76x is really close to the STM32F4 family, so the most concise
implementation is just using CHIP_FAMILY_STM32F4 and adding
CHIP_VARIANT_F76X.

Tune the clock settings to 180 Mhz CPU clock as the goal is performance.
(over-drive is not implemented yet to get to 216 Mhz)

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=ran on nucleo-f767zi board.
'make BOARD=nucleo-f767 flash', the red LED is on and the green LED
turns on/off when pressing the user button, UART console works properly.

Change-Id: I1f67df3aec874c965c81188df46c72de210728d9
Reviewed-on: https://chromium-review.googlesource.com/612750
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-08-18 16:46:34 -07:00
Vincent Palatin
b6d83d456f stm32: remove stm32f4 dead code in DMA
The STM32F4 family is building a special variant of the dma code
(dma-stm32f4.c), all the conditionals for F4 in stm32/dma.c are just
dead code. remove them.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=make buildall

Change-Id: Icbf8d08c7e50fe5153a1b3830011bb12afcabaa5
Reviewed-on: https://chromium-review.googlesource.com/621391
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-08-18 16:46:33 -07:00
Nicolas Boichat
58374f7d26 usb_hid_touchpad: Add touch event to FIFO during suspend
Similarly to what we have done with keyboard events, we put touch
events in a FIFO. The AP will need to interpret the timestamp
in the events to be able to process the events correctly tough.

Resume should typically take about 50ms, so a 8-event long FIFO
should be good enough. Also, we bypass the FIFO altogether in most
cases, when the USB interface is not suspended.

BRANCH=none
BUG=b:35775048
TEST=Connect hammer, force autosuspend using:
   DEVICE=$(dirname $(grep 5022 /sys/bus/usb/devices/*/idProduct))
   echo 500 > $DEVICE/power/autosuspend_delay_ms
   echo auto > $DEVICE/power/control
   Look at evtest output.
   Wait a second, make a swipe, see that events are received in
   a very short amount of time after resume (every EP interval/2ms),
   but the event timestamps show that some of them are older.

Change-Id: If6ab56396f7d564b19e6c3c528847196ffa4d849
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/612221
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-16 06:03:49 -07:00
Nicolas Boichat
fb58920c9e usb_hid_touchpad: Add timestamp field to touch events
We use the unofficial, Windows 8, Relative Scan time HID usage
(Digitizer page, 0x56) to add timestamps to our HID touchpad
events.

The timestamps is a rolling, unsigned, 16-bit integer, with a
resolution of 100us (so it wraps around every 6.5s).

The host will be able to synchronize to that timestamp, resetting
an offset every time the touchpad is quiet a certain amount of
time (e.g. 1 second).

BRANCH=none
BUG=b:63685117
TEST=Flash hammer, timestamps are reported in HID descriptor.

Change-Id: Ie5d56a9df14e464d2cdcd559f550d6e3cc81961f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/603041
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-16 06:03:49 -07:00
Nicolas Boichat
845739c022 chip/stm32/usb_hid_keyboard: Add keystrokes to a FIFO
Put key events in a FIFO. This is especially useful when USB is
suspended, so that we can replay the events on resume. This makes
sure that no key strokes are lost on resume from USB autosuspend.

We coallesce events happening within some interval (18 ms), greater
than EP interval (16 ms) to ensure we cannot have a backlog of keys.
The interval must also be short enough to ensure that the intended
order of key presses is passed to AP, and that we do not coallesce
press and release events (which would result in lost keys).

We also discard key events in the FIFO buffer that are older than
1 second. Note that we do not fully drop them, we still update
the report, but we do not send the events individually anymore
(so an old key press and release will be dropped altogether, but
a single press/release will still be reported correctly).

BRANCH=none
BUG=b:35775048
TEST=Connect hammer, force autosuspend using:
   DEVICE=$(dirname $(grep 5022 /sys/bus/usb/devices/*/idProduct))
   echo 500 > $DEVICE/power/autosuspend_delay_ms
   echo auto > $DEVICE/power/control
   Wait a second, type something quickly, verify that no keys are lost.

Change-Id: I64d33c15a39ae33af42039fba62cf4ed3abef462
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/471188
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-16 06:03:48 -07:00
Nicolas Boichat
5adaee4156 chip/stm32/usb_hid_keyboard: Simpler buffer handling
As suggested in CL:411741, makes the follow-up CL that buffers
key strokes much simpler.

We can revisit later if we can still sneak it that change, but,
all in all, we can guarantee the same key latency by halving the
USB endpoint interval.

BRANCH=none
BUG=b:35775048
TEST=Connect hammer, keyboard works.

Change-Id: I6624fde9bd5561ddceb7ce195470d7af7cca7140
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/471187
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-16 06:03:48 -07:00
Nicolas Boichat
9e33d6ce3c chip/stm32/usb: Replace reset handler by generic event handler
Some USB interface handlers need to know when USB has been
successfully resumed after a wake event. For example, this is
useful so that HID keyboard can send the events at the right time.

BRANCH=none
BUG=b:35775048
TEST=Using USB HID keyboard patches to queue keys in a FIFO:
     After USB autosuspends, press a single key and hold it. Without
     this patch the endpoint data only gets reloaded on the _next_
     event.
TEST=On hammer, I2C passthrough still works.

Change-Id: I9b52b9de16767c8a66c702a5ae70369334a3d590
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/569547
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-16 04:03:24 -07:00
Philip Chen
abd446b806 scarlet: Remap DMA channels for USART1
To enable console with DMA, we need to specifically
remap DMA channels for USART1.

ch2/3 and ch6/7 are already used by SPI1/2 modules.
So we have to remap USART1_TX to ch4 and USART1_RX to ch5.

BUG=b:64575809
BRANCH=none
TEST=confirm ec console works on scarlet rev1

Change-Id: Ie2bb141c72252aee98e4cd4a284a01b4d57605f4
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/611147
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-15 18:29:22 -07:00
Nicolas Boichat
72ea1febb1 chip/stm32/usb: Split usb wake handler as a different function
Indentation is growing out of control, let's move to a separate
function so that we can return early.

BRANCH=none
BUG=b:35775048
TEST=Flash hammer, usb_wake works.

Change-Id: I9abf99ff55b3977dfc307fc99aac6f1ab7dd1f6a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/612922
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-15 05:20:21 -07:00
Nicolas Boichat
1ba0395a18 usb_api.h: Stub usb_wake if CONFIG_USB_REMOTE_WAKEUP is not defined
Removes clutter in callers, so that they do not have to wrap
usb_wake calls around ifdefs.

BRANCH=none
BUG=none
TEST=make buildall -j

Change-Id: I8641cb7aff702920aaa119e644dc812d5c3e774b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/612220
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-12 05:22:03 -07:00
Nicolas Boichat
b6dca75c35 chip/stm32/usb: Increase resume timeout to 3 seconds
When resuming from S3, it may take a while for the bus to become
alive again, so let's increase the timeout. 3 seconds is probably
a bit too long, but should work for our purpose: we just do not
want to be stuck in that state forever.

BRANCH=none
BUG=b:35587173
TEST=Use powerd_dbus_suspend to put poppy in S3. Press key, see
     that hosts sometimes takes ~90ms, but sometimes up to 1.5s
     to resume.

Change-Id: Ic800481b2b500fb68a8d1de16b11cbe77a4013d4
Reviewed-on: https://chromium-review.googlesource.com/569523
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-06 02:33:37 -07:00
Nicolas Boichat
686e3479f5 chip/stm32/usb: Fix resume handler in usb_wake
In the previous version of the code, we were counting ESOF (every
ms) to figure out when to clear the resume bit, and then using ESOF
counts again to wait for the USB interface to resume.

This missed the fact that ESOF (expected SOF) interrupts are not
triggered when SOF are actually received.

Somehow, this worked fine in most cases, except that sometimes the
last ESOF would race with the RXDP/RXDM going to state 2, and we
would not know that the resume completed successfully.

Let's also count SOF interrupts, and also take a received SOF as an
indicator of a successful resume.

While we're at it, trim down USB debugging messages, and add a line
when resume is successful.

BRANCH=none
BUG=b:35587173
TEST=Connect hammer, force autosuspend using:
     DEVICE=$(dirname $(grep 5022 /sys/bus/usb/devices/*/idProduct))
     echo 500 > $DEVICE/power/autosuspend_delay_ms
     echo auto > $DEVICE/power/control
     Add debugging in hammer code, make sure that usb_wake_done goes
     back to 1 after resume succeeds.

Change-Id: I206c9c6b3066a3a337b6bd2370c9d0c6a9e2396c
Reviewed-on: https://chromium-review.googlesource.com/569522
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-06 02:33:37 -07:00
Stefan Reinauer
47115a93ef Fix compilation with coreboot-sdk
Signed-off-by: Stefan Reinauer <reinauer@google.com>
BRANCH=none
BUG=none
TEST=The following sequence passes
	sudo emerge coreboot-sdk
	export CROSS_COMPILE_arm=/opt/coreboot-sdk/bin/arm-eabi-
	export CROSS_COMPILE_i386=/opt/coreboot-sdk/bin/i386-elf-
	export CROSS_COMPILE_nds=/opt/coreboot-sdk/bin/nds32le-elf-
	make buildall -j

Change-Id: I4cafbcd70efd6bdf102f848f1cca4772b4ccd10e
Reviewed-on: https://chromium-review.googlesource.com/595207
Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
2017-08-04 18:08:16 -07:00
Nicolas Boichat
d633871ef6 usb_hid_*: Fix __packed struct coding style
EC code style should use __packed at the end of the structure,
rather than __attribute__((__packed__)).

BRANCH=none
BUG=none
TEST=Flash hammer

Change-Id: Ib5dc71a8439038d46b9bc331bdabff7c57c7300a
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/597037
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-08-02 08:16:00 -07:00
Nicolas Boichat
043c550262 chip/stm32/usb_hid_touchpad: Widen pressure field to 10 bits
id only really needs 4 bits (16 touch events should be more than
enough), so we can steal 2 bits from that field.

We also reorder the fields to make sure that width/x are aligned
on 8-bit boundary.

BRANCH=none
BUG=b:63936194
TEST=Flash hammer, touchpad works, ABS_PRESSURE > 255 is reported
     when a palm is pressed on the touchpad.

Change-Id: I1abf1bf53cc9dd998082cea5dc7cd3be17f99ec6
Reviewed-on: https://chromium-review.googlesource.com/583297
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Chun-ta Lin <itspeter@chromium.org>
Reviewed-by: KT Liao <kt.liao@emc.com.tw>
2017-07-31 07:38:06 -07:00
Gwendal Grignou
a35218e204 stm32f4: Add OTP support.
Add support for OTP memory: if needed store serial number in first bank.

BUG=chromium:746471
BRANCH=none
TEST=On sweetberry, check we can write serial number with serialno
command. Check serial number survive a firmware update.

First, check without write protect, check we can write 0s (but not 1s)
serialno
Serial number: NNNNNNNNNNNNNNNNNNNNNN
>
> serial set MMMMMMMMMMMMMMMMMMMMMMMMMMMMM
Saving serial number
Serial number: LLLLLLLLLLLLLLLLLLLLLL

After lock enabled, check we can not overwrite.
> serial set AMMMMMMMMMMMMMMMMMMMMMMMMMMMM
Saving serial number
Serial number: LLLLLLLLLLLLLLLLLLLLLL
Access Denied

Check that serialno returns "Uninitialized" if it was never set.

Change-Id: I9ab08486a7c3e1958e964649640d69b5b70947e3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/580290
Reviewed-by: Nick Sanders <nsanders@chromium.org>
2017-07-28 17:45:13 -07:00