Commit Graph

10 Commits

Author SHA1 Message Date
Randall Spangler
c72f66c050 Add wake signal to PCH
This works similar to SCI/SMI events, but triggers a separate
level-sensitive signal to the PCH instead.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8514
TEST=manual

From EC console:
gpioget PCH_WAKEn --> should be 1
hostevent wake 0x1
close lid switch (with magnet)
hostevent -> should show wake mask 0x1, raw events 0x1
gpioget PCH_WAKEn --> should be 0
hostevent clear 0x1
hostevent -> should show raw events 0
gpioget PCH_WAKEn --> should be 1

Change-Id: I29832c1dc30239a98987578f07dfeb25791dde11
2012-03-15 12:42:11 -07:00
Randall Spangler
2464e96469 Add SMI/SCI support
BUG=chrome-os-partner:8277
TEST=manual

On EC console:
   hostevent set 0x1e
From root shell:
   ectool eventget --> should return 0x1e
   ectool eventclear 0x02
   ectool eventget --> should return 0x1c
   ectool queryec  --> should return event 3
   ectool queryec  --> should return event 4
   ectool queryec  --> should return event 5
   ectool queryec  --> should return no event pending
   ectool eventsetsmimask 0x1200
   ectool eventsetscimask 0x0034
   ectool eventgetsmimask --> should return 0x1200
   ectool eventgetscimask --> should return 0x0034
On EC console:
   hostevent --> should show raw=0 SMI mask = 0x1200 SCI mask = 0x34

Change-Id: I33042fa80c0b148cd63209a94a184af493e25ed3
2012-03-05 09:23:51 -08:00
Randall Spangler
9a60f37c8d Refactor LPC status / result codes
This is necessary to support SCI/SMI events.

Note that this breaks compatibility with previous ectool builds - and
probably also breaks flashrom support.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8253
TEST='ectool hello' and 'ectool flashinfo' still work
and 'ectool usbchargemode 3 1' fails with error 2

Change-Id: If39e5b6e7cdcec1b5ec765594e8492925b430b10
2012-03-01 15:22:14 -08:00
Randall Spangler
4c89ccd89e Register host commands the same clever way we do console commands
BUG=none
TEST=run assorted ectool commands

Change-Id: I830d3cbf2d1557b3ab455ec8736d3de5e5d3e697
2012-02-28 13:58:34 -08:00
Randall Spangler
6101cebb6a Reduce LPC command parameters to 128 bytes; add LPC memory-mapped space
This will allow more efficient access to EC-provided data (temperature,
fan, battery) by the main processor.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7857
TEST='ectool hello' from link main processor should still work

Change-Id: I2dc683f3441b34de9fb4debf772e386b9fdcfa82
2012-02-15 15:12:03 -08:00
Randall Spangler
300e7edb87 Add UART1 receive support (UART to x86 console)
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7488
TEST=type things into the x86 console UART; should appear on the u-boot prompt

Change-Id: I75fd225842c03d11d79280fb7453ad37695279e3
2012-02-06 14:53:49 -08:00
Louis Yung-Chieh Lo
7e8d739b38 Fix the missing IRQ problem.
The problem comes from the different assumption of interrupt mode in EC and
the PCH. The PCH assumes IRQ1 is edge-triggered and triggered at a rising edge.
However, the auto-IRQ functino of EC is level-triggered and uses low-active to
assert an IRQ. This makes the deadlock so that the kernel never gets an
interrupt until a byte is manually pulled from host.

So, the solution is manually firing an IRQ_1 to host after EC puts a byte to
port 0x60. Note that the auto IRQ needs to be disabled in order to avoid
the interference with manual IRQ generation.

This CL also moves chip specific code to lm4/lpc.c and handle some minor
keyboard commands.

BUG=none
TEST=on hacked baord.

Change-Id: Ib57f5a4d749cb019e4c3c00da110054c4f335c7b
2012-02-02 20:51:45 +08:00
Randall Spangler
70c3e30b63 Clean up UART code
LPC module no longer directly talks to UART registers, and vice-versa.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST='ectool sertest' on target system

Change-Id: Id070c0d849bdfe91c752e0af651d357b695d2648
(cherry picked from commit ab8c3c2b8e3b08a4bf5573cda3a12dd3a384e67d)
2011-12-12 14:12:09 -08:00
Randall Spangler
20886cb9c0 Add user-mode LPC endpoint
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST='ectool hello' on target system

Change-Id: I39845c2ea107ea6f85ef556d58e49343f5a0e9c0
2011-12-08 16:18:20 -08:00
Randall Spangler
bdf7da5b08 Initial sources import 1/3
source files mainly done by Randall.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

Change-Id: Iaff83a842b17f3350fb6f2a3f1597ad4c29bd12a
2011-12-07 19:10:02 +00:00