Add npcx_evb in board folder for testing
Add shared-spi arch support in common layer.
Modified drivers for
1. Fan.c: console command “pwmduty”.
2. Pwm.c: for the issue when set duty to 0.
3. System.c: for hw reset only during system reset.
4. Flash.c: Fixed access denied bug of the flash driver for host command.
5. Comments from Patch Set 1
6. Comments from Patch Set 3 (except sha256.c)
7. Add openocd and flash_ec support for npcx_evb
8. Add little FW and spi-flash upload FW in chip folder
9. Add optional make rules for PROJECT_EXTRA
10.Replace CONFIG_SHRSPI_ARCH with CONFIG_CODERAM_ARCH and remove changes
in common layer sources for shared-spi arch. (except sysjump)
11.Find the root cause of JTAG issue and use workaround method
with SUPPORT_JTAG in clock.c
12 Execute hibernate in low power RAM for better power consumption
13 Add workaround method for version console command
14 Modified coding style issues by checkpatch.pl tool
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I5e383420642de1643e2bead837a55c8c58481786
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233742
When displaying the temps, if the sensor has valid entries to
control the target fan speed, show them. This lets us see which
sensor is the main player in the cooling needed without doing a
bunch of math.
BUG=none
BRANCH=none
TEST=manual
On the EC console:
> thermalget
sensor warn high halt fan_off fan_max name
0 368 370 372 316 358 PECI
1 0 0 0 0 0 ECInternal
2 0 0 0 314 328 I2C-Charger-Die
3 0 0 0 0 0 I2C-Charger-Object
4 0 0 0 308 322 I2C-CPU-Die
5 0 0 0 0 0 I2C-CPU-Object
6 0 0 0 301 317 I2C-Left C-Die
7 0 0 0 0 0 I2C-Left C-Object
8 0 0 0 302 316 I2C-Right C-Die
9 0 0 0 0 0 I2C-Right C-Object
10 0 0 0 303 317 I2C-Right D-Die
11 0 0 0 0 0 I2C-Right D-Object
12 0 0 0 316 327 I2C-Left D-Die
13 0 0 0 0 0 I2C-Left D-Object
Then, before this CL:
> temps
PECI : 308 K = 35 C
ECInternal : 309 K = 36 C
I2C-Charger-Die : 307 K = 34 C
I2C-Charger-Object : Not calibrated
I2C-CPU-Die : 304 K = 31 C
I2C-CPU-Object : Not calibrated
I2C-Left C-Die : 302 K = 29 C
I2C-Left C-Object : Not calibrated
I2C-Right C-Die : 303 K = 30 C
I2C-Right C-Object : Not calibrated
I2C-Right D-Die : 303 K = 30 C
I2C-Right D-Object : Not calibrated
I2C-Left D-Die : 306 K = 33 C
I2C-Left D-Object : Not calibrated
After this CL:
> temps
PECI : 308 K = 35 C 0%
ECInternal : 309 K = 36 C
I2C-Charger-Die : 307 K = 34 C 0%
I2C-Charger-Object : Not calibrated
I2C-CPU-Die : 304 K = 31 C 0%
I2C-CPU-Object : Not calibrated
I2C-Left C-Die : 302 K = 29 C 6%
I2C-Left C-Object : Not calibrated
I2C-Right C-Die : 303 K = 30 C 7%
I2C-Right C-Object : Not calibrated
I2C-Right D-Die : 303 K = 30 C 0%
I2C-Right D-Object : Not calibrated
I2C-Left D-Die : 306 K = 33 C 0%
I2C-Left D-Object : Not calibrated
Change-Id: I12bca5826e8a5a3325710fa5d39cec88f1cc95b1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240517
prevent_hot_discharge and prevent_deep_discharge are near-identical
copies of one another, and can be combined without the loss of any
useful functionality.
BUG=chrome-os-partner:35188
TEST=Manual on Samus. Charge to 2% and boot system with 5V power supply.
Verify that warnings print to console and AP powers down after 30s. Also
pass unit tests.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0f1da5248825a3884f7910babc742dfa7eadf5a3
Reviewed-on: https://chromium-review.googlesource.com/240033
Another fix for redundant requests. This time there can be
redundant requests if the maximum allowed voltage changes,
but we still fall into the samus PDO index and therefore are
asking for the same voltage. This fixes by checking the voltage
value we actually request vs. the max value we can request.
BUG=none
BRANCH=samus
TEST=samus to samus was causing redundant requests and now it's
not.
Change-Id: Ie49add1a42b86de97cee87f9d4637dd0578e2ce3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/239950
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Implement the new type-C connect state machine which removes
lock and hold times and adds a debounce time to make sure
CC lines settle before going into the attached state.
This also adds detection of accessories, but doesn't do anything
when an accessory is detected.
BUG=chrome-os-partner:33680
BRANCH=samus
TEST=test samus connected zinger and samus connected to samus. make
sure that the connection is always formed. also tested with a third
party with old state machine implementation and formed a connection
every time.
Change-Id: I91a7a6031bc35082cc19d7697142e4aa92ef46f2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If the EC controls the lightbar and sets the sequence when
it notices the chipset transitioning between states, we can't
make exceptions for cases where we don't want to activate the
lightbar, such as in dark resume. Instead, let's make it a
separate command that we expect from the kernel.
BUG=chrome-os-partner:32181
TEST=build on samus, verify lightbar does correct thing with
manual control set
BRANCH=ToT
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Change-Id: I5dc619cbbf2498e2ef03ce622831b33e14c7c495
Reviewed-on: https://chromium-review.googlesource.com/239215
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Fix potential junk at end of PD TX transmit by adding to the DMA
transmit complete interrupt a blocking wait for SPI to finish and
then immediately disable SPI clock. This means we block in an
interrupt function for approximately 45us at the end of every
transmit. But, this is the highest priority thing going on anyway.
Note, there is still a potential for junk if both ports are
transmitting at the same time and finish very close to the same time.
BUG=chrome-os-partner:34600
BRANCH=samus
TEST=load onto samus and test communications with zinger. tested
specifically with an old zinger CL,
https://chromium-review.googlesource.com/#/c/226118/11,
which watchdogs when samus has junk at end of transmit. Tested
without this CL and verified we could never successfully flash zinger
over PD due to this watchdog and verified on scope presence of junk.
Then tested with this change and was able to successfully flash
zinger using ectool on both ports in both polarities.
Change-Id: If0cd9ab0551d36a7d7dc10232b6476dd56735972
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/239244
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
VESA DisplayPort Alt Mode on USB Type-C Standard specifies:
When DisplayPort Configuration is not selected (and the converter is
driving its HPD output low), the converter shall track the current
state of HPD, ready for appropriate indication when DisplayPort
Configuration is subsequently selected.
Not only are we violating specification here but it also causes a race
between enabling DPout muxes to AUX line which in turn causes GPU to
timeout trying to read EDID/DPCD on occasion.
Change adds post_config function for DFPs alternate mode and in the
case of DP it sets the dp_on flag there. This allows attention
function to correctly defer HPD_HI that may accompany 'DP status' VDM
to be queued (deferred) until such time that AUX muxes are enabled
properly.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35219
TEST=manual, using hoho & dingdong
With kernel bootarg drm.debug=0x6 following cases all show these
drm debug lines:
[drm:i915_hotplug_work_func], Connector DP-2 (pin 5) received
hotplug event.
[drm:intel_dp_get_dpcd], DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00
00 00 00
[drm:intel_hpd_irq_event], [CONNECTOR:38:DP-2] status updated from
disconnected to connected
case1: boot connected to external display
case2: attach dongle to external display then samus
case3: attach dongle to samus then to external display
case4: connect/disconnect rapidly on type-C side
case5: connect/disconnect rapidly on external display side.
Change-Id: I40eab797fdd5090c8ad13fae2cd053b740d9a307
Reviewed-on: https://chromium-review.googlesource.com/239420
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
It's not safe to sysjump with a DMA enabled as it can led to memory
corruption after we have landed in the new image before that piece of
hardware is re-configured.
Implement and call dma_disable_all() on all platforms with generic DMA.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=all
BUG=chrome-os-partner:34865
TEST=on various boards, call "sysjump rw".
Change-Id: I2a6b63ff19c2d932a5e31bc375bf468bc8ae5125
Reviewed-on: https://chromium-review.googlesource.com/237340
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
With CL:
5ef45ad pd: Add timeout for HC flash commands.
I thought I'd licked the timeout related issues with flashing dingdong
& hoho.
With further testing however I found I was occassionally hitting the
failure where I couldn't return from 'flash erase' on PD peripheral
prior to the 1 second limit for host command timeout.
That could be remedied by retrying the erase on the host side which
then succeeds quickly. That solution seems non-optimal however.
Additionally, even when erase does succeed in <1sec we have the shared
i2c bus pending. That too is non-optimal.
For those reasons I've decide to return immediately from flash erase
command and instead put the burden of waiting the necessary time on
the host which at least does have some wider perspective on what the
system is attached to and doing.
CL also adds following related changes:
1. corresponding ectool edit to delay 3sec after RW erase.
2. fixup to error returns from hc_remote_flash for timeouts.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33947
TEST=flashing dingdong/hoho via ectool works reliably.
Change-Id: I8fbfb592f760273b26bcb16b67210d569454eee2
Reviewed-on: https://chromium-review.googlesource.com/239253
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Refactor pd_exit_mode to be only a DFP function. Additionally make
pe_init a public function and call it during hard reset.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33946
TEST=manual, using pdsetmode from later patches see proper exit and
resetting of pe struct.
Change-Id: I45afe1f82926f1c32f4d84eb60c65f1f39b19d81
Reviewed-on: https://chromium-review.googlesource.com/236958
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
These USB type-C accessories don't have a write-protect GPIO.
Add a configure flag (CONFIG_WP_ALWAYS) to force the flash
write-protection on the dongles.
Also set the read protection (by elevating RDP to level 1),
so trying to unprotect the flash will trigger a full erase.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35088
TEST=boot Hoho,
check the flash OBR and WRPR registers:
"rw 0x4002201c" / "rw 0x40022020"
and the option bytes write-protect bits: "rw 0x1FFFF808"
dump the logical state with "flashinfo" command.
> rw 0x4002201c
read 0x40022020 = 0xffff0002
> rw 0x40022020
read 0x40022020 = 0xffff0000
> rw 0x1FFFF808
read 0x1ffff808 = 0xff00ff00
> flashinfo
Physical: 128 KB
Usable: 128 KB
Write: 2 B (ideal 2 B)
Erase: 2048 B (to 1-bits)
Protect: 4096 B
Flags: wp_gpio_asserted ro_at_boot ro_now
Protected now:
YYYYYYYY YYYYYYYY ........ ........
Change-Id: I45bbc0bce40ecc174b6b8a1ebacf4f53d2fd372d
Reviewed-on: https://chromium-review.googlesource.com/238893
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
These versions of the queue add and remove methods support
using memcpy like routines to access regions of memory with
specific requirements. In particular, this will allow for
transfers between queues and USB packet RAM on the STM32
which has specific access requirements.
This change also includes an update to the mem* util routines
to make their prototypes compatible with C89 and POSIX
standards.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Test USB Echo functionality on discovery-stm32f072 board to
ensure that queues still function correctly.
Change-Id: I557064d99abfc3e8cfc98099a1d94334a976550c
Reviewed-on: https://chromium-review.googlesource.com/239217
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Previously there was just a memcpy_usbram that copied to
USB packet memory, and no routine to copy out. This adds
the "from" version and renames and improves to "to" version.
The improvement is that the new "to" version correctly
handles unaligned beginning and endings of the region to
be copied. These need to be read/modify/write accesses since
the USB packet ram has to be manipulated in 16-bit chunks.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Verify that discovery-stm32f072 still enumerates and communicates
correctly over USB.
Change-Id: I94353e66ad0248d4e674abb29f9a88e979767655
Reviewed-on: https://chromium-review.googlesource.com/238764
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
When changing a port that is sourcing power to a force sink role,
then make sure VBUS is turned off before going to SNK_DISCONNECTED.
BUG=chrome-os-partner:34036
BRANCH=samus
TEST=test on plankton with samus. verify can change from source to
sink multiple times with no problems
Change-Id: I781f6f4395845f949d00b322e4e87c150aeba187
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233755
Currently, 'ectool usbpd' shows PD task state in numerical format. Every
time we add/remove a state, the number changes, and this makes the
command difficult to use. Modify the command to print the name of the PD
task state.
BRANCH=Samus,Ryu
BUG=chrome-os-partner:34296
TEST=Run 'ectool usbpd 0' with different combination of new/old PD
firmware and new/old ectool.
Change-Id: Ic0daa03e9f7565c1322166713c2cce3b7cb93a30
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/237623
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
For flash commands add timeout so if VDM doesn't return properly host
can receive error message.
Note, for flash erase its performed by page at a cost of 20-40ms
according to datasheet. For hoho/dingdong that leaves maximum erase
time at 40ms * 32 =< 1280ms which is above the host command timeout.
Increasing the host command delay (i2c bus pending) is not an option
and since the erase will complete and subsequent erases will be much
faster do to early out in physical_flash_erase this solution should be
acceptable.
Future CLs could alternatively push the burden of command latency to
host altogether and return EC_RES_SUCCESS in similar fashion to reboot
command.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33947
TEST=manual, if VDM doesn't return by timeout HC command is properly returned
EC_RES_TIMEOUT error code.
Change-Id: I33c515200c2999dd97fdd690a7e900c5548b2d47
Reviewed-on: https://chromium-review.googlesource.com/238290
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Initial VDM implementation had a very conservative 500msec timeout period. This
CL adds the timeouts defined in the USB-PD specification for various commands.
Additionally it adds a state to the vdm state machine to allow proper busy
response handling.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:30645
TEST=manual,
Alternate mode and flashing still work. Creating a VDM responder which returns
busy shows retries from initiator after at least 100msec.
Change-Id: I79f5da557ca9faf63d2299bb77009f6d98a782bd
Reviewed-on: https://chromium-review.googlesource.com/235682
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Add hot key detection for alt + volume down + 0|1|2 to set the
charging port by sending the charge override command to PD MCU.
This should be removed once hot-keys (or some other UI) is added
to higher layers.
BUG=chrome-os-partner:34850
BRANCH=samus
TEST=load onto samus and connect to another samus. use hot keys
and see that charge override command gets set appropriately on
PD MCU.
Change-Id: I7e72d597a02b7aca3326911796d20003f6697077
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238226
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For samus, on PD connection or on resume to S0, if we are a sink,
and the other side supports PR_SWAP, then attempt a power swap.
This adds callback functions into board policy file to check
and issue power or data swaps if required by the product.
BUG=chrome-os-partner:31195
BRANCH=samus
TEST=connect samus to zinger and make sure zinger always ends up
as SRC-UFP.
connect samus to samus with both in S0 and see that
they swap power roles once and not data roles.
connect one samus in S0 to one samus in S5 and see that the one
in S5 is sink. then when you boot the one in S5 it switches to a
source.
connect samus to samus with both in S0. do chgoverride 1 on one
side to start charging from the other samus. then on the same
side, turn off the machine (S5) and resume (S0), and see that it
is still charging from the other samus (ie has not switched roles
to source).
Change-Id: Ifab2465fccef77448ac4771a3c2de1c867cbbec4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238302
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add NoResponseTimer to go to disconnected state after some number
of hard resets with the port partner non-responsive. This only takes
affect when the port partner is known to be PD capable, i.e. has sent
us PD communications in the past. This is useful as a last resort to
attempt to restore PD communications with a port partner.
BUG=chrome-os-partner:34976
BRANCH=samus
TEST=load onto two samus', connect with C to C cable, and let them
form a PD contract, then on one side disable PD comms with "pd enable 0"
and from the other side initiate some PD traffic, such as "pd 1 soft".
See that the side with PD communications enabled sends two hard resets
and then goes to disconnected state, then goes to discovery state and
acts as if a non-PD capable device is attached.
Change-Id: Id40ce7eb05b8b7ae6a4f70b9d08ce6cad0d471fe
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238300
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Create optional config to remove 'typec' command for flash savings.
While its a useful command to many developers its not used in any
factory flows and costs ~500bytes of flash space.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual, compiles and command still there. If #undef saves ~500bytes.
Change-Id: I02c0ec1dd503b02f86d8ac3d5e99ed6ad493c95c
Reviewed-on: https://chromium-review.googlesource.com/238462
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Create optional config to remove 'hash' console command and undef it
for a few space-constrained boards (ryu*, samus_pd).
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual,
- compile for ryu, samus_pd and save ~400bytes
- 'hash' command no longer appears as a console command
Change-Id: I054fd4473911dd362c2c1d171ee7aaad859d893a
Reviewed-on: https://chromium-review.googlesource.com/238433
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
We've extended host command range from 8-bit to 16-bit. Extend
EC_CMD_GET_CMD_VERSIONS so that the host may query supported command
versions of the new host commands.
BRANCH=All
BUG=chrome-os-partner:26577
TEST=Extend 'usbpd' to version 1. Test that we can check its version.
TEST=Run 'ectool gpioget' with new ectool and old EC.
TEST=Run 'ectool gpioget' with old ectool and new EC.
Change-Id: I1651aaf21ac2604aea101244b5e53713ead8c1af
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/237622
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add a lightbar indicator if a charger is attached and we refuse to
power-up the AP due to battery level.
BUG=chrome-os-partner:31127
TEST=Manual on Samus. Attach charger with depleted battery, verify that
lightbar pulses red. Remove charger and verify that lightbar stops
pulsing. Also verify the same with missing battery.
BRANCH=Samus
Change-Id: Icddd543dc34e36ac04957ea07bde0e2d5709f74b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236023
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add config option, CONFIG_CMD_PD_FLASH, and undef by default. This subcmd in
the 'pd' command is large (500 bytes) and can be performed from host via
ectool.
Additionally the python script, util/flash_pd.py, is likely outdated or needs
adjustments for various timing related nuances.
Note, as flash command contained subcmd 'version' have added that under
'pd <port> vdm vers' to keep that functionality by default.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual,
run 'pd 1 flash signature' get 'parameter 1 invalid'
run 'pd 1 vdm vers' w/ zinger in port 1 see version string returned.
Change-Id: If282933c1d29febb43b5cf476a121be6b5a1071b
Reviewed-on: https://chromium-review.googlesource.com/238291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Change PD receive timeout to 1.8ms. The max packet ever received
should be ~1.59ms, so this should be safe.
BUG=chrome-os-partner:33693
BRANCH=samus
TEST=load onto zinger and samus and connect a bunch of times.
also tested with PD communication disabled on samus and verified
that zinger sends source cap 50 times (each with 4 retries) and
then stops.
Change-Id: If82b2905d6f9118956229682d7f259fb94da0258
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238305
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add new state to wait for getSinkCap response. We use the READY states
in the PD state machine to indicate that we are not waiting on a response.
This assumption is necessary for VDMs to know whether or not it is ok
to send. This CL fixes a bug in that assumption.
BUG=chrome-os-partner:33861
BRANCH=samus
TEST=load onto zinger. without this change, under the right circumstances
it was possible for a collision between a VDM (response to discover identity)
and an incoming response to the getSinkCap. This would cause the discovery
identity response to get dropped. with this change, when discover identity
response is queued it is delayed until after the getSinkCap response.
Change-Id: I16f4d5272e68bf699d0aecba12bdf6d6b8ff7fc7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238239
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When battery is full and system is not in S0, then stop charging
and allow battery to power the system. Once battery is no longer
full and requests current, allow charging again. This is to work
around power consumption issues in our AC input path. The charge
override port is stored upon entering S3 and restored going back
to S0 so that the charge override port is not affected by this.
This also fixes lightbar so lightbar checks if battery is full
instead of checking raw percentage. The lightbar is also changed
to use the last tap direction if no charger is plugged in. And
the lightbar tap for battery threshold for turning green is
lowered to 95%.
This also moves some samus_pd board code out of interrupt handlers
and in to deferred functions to minimize time in interrupts.
BUG=chrome-os-partner:34640, chrome-os-partner:34847
BRANCH=samus
TEST=load onto samus. use battfake command from pd console to
set battery percentage. when system is in G3, see that
batt = 100% stops charging, and when batt < 100% it starts
charging again.
tested that we receive host command from EC with battery
information every time battery changes SOC.
Change-Id: Ia8e0721508e34ee3630f5e5b0c2f431a00329caf
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236411
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change delay between sending hard reset and cutting VBUS
from PD_T_SINK_TRANSITION (35ms) to the new timeout
PD_T_PS_HARD_RESET (15ms).
BUG=chrome-os-partner:34985
BRANCH=samus
TEST=make -j buildall
Change-Id: I1dfcdc790ae748aa56350814d8c40d376eba68fc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238230
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
define CONFIG_CMD_BATDEBUG to enable console commands.
If the battery is larger than 6Ah or smaller than 150mAh, scale the parameters
transparently to the user using macros.
BUG=chrome-os-partner:34477
BRANCH=none
TEST=Custom console commands for the fuel gauge
I also used a Logic16 from Saleae and the fuel gauge on hadoken.
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Change-Id: I959d51c3188336e4ad0983528ad7e53a2955a764
Reviewed-on: https://chromium-review.googlesource.com/234285
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Myles Watson <mylesgw@chromium.org>
This conversion is needed in files outside of system.c, so add a new
function.
BUG=chrome-os-partner:34599
TEST=Manual on samus_pd. Run "pd 0 info" and verify "Image RW" is
printed.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ia905ba9cf985f3714fa75c81670b8a39e9608f3d
Reviewed-on: https://chromium-review.googlesource.com/236980
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
This addition allows the AP to query whether the PD device is currently
running from RO or RW FW.
BUG=chrome-os-partner:34599
TEST=Manual on Samus. Run 'ectool --name cros_pd infopddev 0' and verify
that correct RO/RW status of Zinger is printed. Verify that the output
matches the index printed by "pd 1 hash" on samus_pd console.
BRANCH=Samus
Change-Id: I4266cae931f5c7855ca0531717c4a18b138b2d62
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236771
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Modify board_set_active_charge_port to return status indicating whether
the selected charge port was rejected. If rejected, zero out its
available charge and attempt to select a different charge port.
Also, reduce the length of related console prints.
BUG=chrome-os-partner:34677
TEST=Manual on Samus. Plug C-to-Arec into port 1, verify that charge
manager does not select port 1 as active and charging icon is not seen
in OS.
BRANCH=Samus.
Change-Id: I56e3337f90c04b93ef7cc9873af6ee0f4b1ffc7d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236361
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Allow CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON to be defined at the board
level to be the minimum battery percentage required for power-on. If the
battery level is below the threshold, or if the battery is missing,
power button presses will be ignored.
BUG=chrome-os-partner:31127
TEST=Manual on Samus with subsequent commit. Verify that AP continues
to boot normally when charge level exceeds
CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON. Verify that power button
presses are ignored when the charge level is below the threshold, and
we return to G3.
BRANCH=Samus
Change-Id: I0ff3f7ddabf38080332470e172c8b2e307bf1655
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236021
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Added check for collision just before transmitting on CC line.
To check for collision, RX monitoring is left on all the time
(except when in the act of receiving or transmitting, or in
between receiving and sending a goodCRC), and a
simple check for RX transmission started is used to see if the
CC line is idle or not.
RX monitoring is also changed to only trigger on 3 edges within
20us, as per the PD spec.
When a collision is detected by seeing that CC is not idle, the
transmitting packet is dropped.
BUG=chrome-os-partner:30135
BRANCH=samus
TEST=load onto samus and zinger. make sure we negotiate and make
sure custom VDMs succeed. enabled pings and made sure we stay
alive with pings for a few min.
Also added code to pd_rx_handler to toggle a test point on EVT
board to verify the timing of when we get RX interrupts:
Change-Id: I22d172163319437d3d901e019eda79d4d592f6b8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226118
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a rate limiter to host commands so that a host that is continuously
sending host commands doesn't watchdog the EC.
BUG=chrome-os-partner:33905
BRANCH=samus
TEST=loaded onto samus and tested remote update of zinger 10 times.
also tested EC + PD software sync.
Change-Id: Ia024179c46b2180ee97ea1902de343306142311c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/235530
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to reduce flash size on some constrained boards this CL
modifies the GPIO macro in gpio_list.h to change the name field from
that listed 'name' to the concat of 'port' and 'pin'.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual
1. build with and without CONFIG_COMMON_GPIO_SHORTNAMES
See 897 bytes savings with config option
2. See reduced names for gpioget
> gpioget
0 E6
0 F2
1 B0
Change-Id: Ife1e1e2bcfa620ba87fe6c1ce2b47fe258c46514
Reviewed-on: https://chromium-review.googlesource.com/234587
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Ryu sensor hub has asymectric RO/RW images. The first one is very limited
(not i2c master, no sensor drivers, gesture recognition).
Image size is alter to offer more space for the RW firmware image,
compiled with ryu_sh board.
To write RO image and basic RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w /tmp/ryu_sh_loader/ec.bin
To write the expected RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w -i EC_RW:/tmp/ryu_sh/ec.bin
BRANCH=ToT
BUG=chrome-os-partner:33908
CQ-DEPEND=CL:231970,CL:233233
TEST=load on Ryu, confirmed limited operation.
Change-Id: Ib976e2b048935adfb9b2b072c071db5be2bc1c09
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231984
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add high (and low) battery temperature warning which sends host
event to AP. After 30 seconds of out of range temp readings force
shut off AP and hibernate the EC.
BUG=chrome-os-partner:27641, chrome-os-partner:33111
BRANCH=samus
TEST=make buildall, and write unit tests to test this condition.
Change-Id: I95b7d9d753c17e4b76218a9845aa63dd1b96a500
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/235645
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
On samus it is possible to have AC plugged in but have the battery
discharging. So, add a new variable to charge state machine for
battery charging status and use that where necessary. For example,
the low battery shutdown code should now be based on whether or
not battery is charging rather than if AC is present.
This also changes the hibernate behavior when battery is low. The
change is to wait 30 seconds in G3 of low battery with no charging
before hibernating because for some chargers, like a USB PD charger,
the charger may increase it's current limit after a little bit of
time.
BUG=chrome-os-partner:34485
BRANCH=samus
TEST=test on samus. use low power charger and make sure that
ectool battery shows the "DISCHARGING" flag. use zinger and see
"CHARGING" flag. also use power_supply_info to make sure that
the battery state accurately reflects reality.
Change-Id: I8ac0267dd393071c4ca1fa24fbc9a13bf27848a9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/235491
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Remove common code across all PD policy layers to select the requested
voltage and build a Request Data Object (RDO).
BUG=none
BRANCH=samus
TEST=Load onto samus and connect zinger. Make sure we request the right
voltage (first 5V, then after initial contract is made, 20V). Make
sure input current limit is set appropriately by checking limit on EC
console using charger command.
Change-Id: Ic6bda5e23b2d7b7d710ffdf085e7fbc1b0c3add9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233673
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
This exposes the pd_exchange_status() function and lets it
return the charge port that the PD reports, so that the lightbar
TAP sequence can decide which direction to display.
BUG=chrome-os-partner:32227
BRANCH=ToT, samus
TEST=make buildall -j
Change-Id: I78b57fbeaaf38fee15c86eca4d90abce77e2f722
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/232092
Reviewed-by: Alec Berg <alecaberg@chromium.org>
