Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8350
TEST=manual
Hack a task function to return. Then see that it prints an error to
the debug console and the EC continues running, instead of seeing a
hard-fault.
Change-Id: Iacd2b83c4d4845bb8e6c61e07c3150df8edc7e49
Implement enable_fpu() and disable_fpu().
enable_fpu() disables interrupt and then enables FPU.
disable_fpu() disables FPU and enables interrupt.
Also added a CONFIG_FPU flag.
BUG=chrome-os-partner:7920
TEST=none
Change-Id: I2d71f396d9c7d7ac4a6a2d525f3d86f8aae87521
Signed-off-by: Vic Yang <victoryang@chromium.org>
Preparatory work to introduce a second SoC : 5/5
All Cortex-M3/4 have the same NVIC registers at the same address.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and check a few console commands
Change-Id: I6b03c4c1fb21850be8c8afb711ea44134c8cdea1
Preparatory work to introduce a second SoC : 3/5
We split the drivers files which contain SoC specific drivers from the
OS files which only depend the actual CPU core.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and test a few commands on the console.
Change-Id: I598f8b23e074da9bd6b0e2ce6689c1075fe854f0
