This is required to allow bumping up of host events to 64-bit by making
space in the rodata. CL 770923 had initially used GPIO_SHORTNAMES, but
HOSTCMD_ALIGNED seems to be a better option.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I63699f9cec244925c031d81f50889851c6da8b5c
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771931
Reviewed-by: Shawn N <shawnn@chromium.org>
Disable ACCELSPOOF and FLASHINFO to save some space. This is required
to support 64-bit host events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I364adb1e224c2084398b4ee5bb9fd24a1c542e0e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771997
Reviewed-by: Shawn N <shawnn@chromium.org>
On Nautilus, we use two ps8751b TCPC chips.
According to the latest schematic (link is in the bug),
we'll place two TCPC chips separately on different I2C ports.
BUG=b:69017605
BRANCH=none
TEST=build/flash nautilus rev0, and confirm PD charging from one
USB-C port works.
Change-Id: Iab7402023f148d478cba249aaf83a23675a7137b
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/758336
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Created Meowth symbolic link to Zoombini.
Modified Zoombini gpio.inc and board, etc. files to
compile a Meowth EC image with the correct gpios.
BUG=b:69133424
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors
Change-Id: Ib34d956efa89ae125de1ce7f8799162c74df0122
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/762039
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
In order to avoid runtime 64-bit left shift, check for extpower and
add two separate calls to host_set_single_event rather than
calculating the parameter at runtime. This avoids the requirement of
runtime logical shift for 64-bit.
BUG=b:69329196
BRANCH=None
TEST=make -j BOARD=samus
Change-Id: I64cacf6253878ed7d69f6b17baeb6c27c470378a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771854
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This reverts commit 1f767e3e91.
This is required to ensure that PMIC VR decay is enabled before
SLP_S0# is asserted. Else, the setting does not take effect and hence
results in higher power consumption.
BUG=b:69337192
BRANCH=None
TEST=make -j buildall. Verified by adding prints that VR decay enable
happens before SLP_S0# is asserted.
Change-Id: I0353f70c65ebe673b0e1b5ddbae2bb04368308cc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771055
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add espi control module for it83xx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. it8390+Intel SKL-Y RVP3 and boot to shell.
2. console command "kbpress 1 4" to test keyboard data.
(board code for espi module test on CL:392587)
Change-Id: I1b32bd16f7e01abf07b9c9a68ebef2399cc9828d
Reviewed-on: https://chromium-review.googlesource.com/394471
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Configure GPIOs to match grunt proto v1.1 schematic.
Change EC chip to npcx7m6f.
Minimal board.c/h, just enough to build.
BUG=b:64935726
BRANCH=none
TEST=make BOARD=grunt
Change-Id: I1a1f581c7ee7b80808c0dde179bc3ee0d69f960e
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/754302
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Support protection of regions that aren't aligned to a power of 2 by
using two MPU entries, and taking advantage of the sub-region feature.
Also protect code RAM from being overwritten, on parts that use external
storage.
BUG=chromium:782244
BRANCH=None
TEST=On kevin, call:
mpu_protect_data_ram();
mpu_protect_code_ram();
mpu_enable();
Verify that first call results in the following update_region params:
addr: 0x200c2000 size: 0xc01d
Decoded: Protect 24K region
Verify that second call results in the following params:
addr: 0x100a8000 size: 0xc021
Decoded: Protect 96K region
addr: 0x100c0000 size: 0xf01b
Decoded: Protect remaining 8K region
Also verify that writes to beginning and end of code ram region trigger
data access violation after enabling protection.
Also verify that sysjump fails.
Change-Id: Ieb7a4ec3a089e8a2d29f231e1e3acf2e78e560a1
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/757721
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Similar to coral and poppy/soraka devices, configure
USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH since nautilus uses parade
TCPC on both ports.
BUG=b:69198785
BRANCH=None
TEST=make -j BOARD=nautilus
Change-Id: If76cf0588744b3adcfd75f4e2ebe0ea9e721683d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767071
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reference CL:
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/762066
The reset line for the parade TCPC on port 1, has an external 1k pull
up resistor. However, the gpio.inc description for this line was set
to OUT_LOW which results in a short reset pulse. This can lead to an
external charger seeing an unattach event and dropping VBUS. On Soraka
systems with certain chargers this results in a continuous reboot loop
when no battery is connected.
Changing the default state of this line to ODR_HIGH prevents reset
from being pulled low until the EC is intializing the TCPC and fixes
the continous reboot loop issue when no battery is connected.
BUG=b:69198785
BRANCH=None
TEST=On a Soraka system, verified that connecting Lenovo Type C
charger on Parade port did not result in reboot loop when no battery
is connected. Earlier this same setup resulted in continuous reboot loop.
Change-Id: I5138e129431ee4f0c1c6ceaaac5ab288c3ab6233
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767070
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch allows Fizz to switch the power source from a type-c
charger to a barrel jack adapter if the system is in S5.
BUG=b:38321259
BRANCH=none
TEST=Verify the following with 45W and 60W type-c chargers:
1. Boot Fizz with a type-c charger
2. Go to S5 if not already.
3. Plug in a BJ adapter. Fizz boots to S0 using BJ power.
Also verified other boot modes are not affected:
1. Auto boot on BJ insert
2. Auto boot on Type-C insert
3. Recovery boot on BJ
4. Recovery boot on Type-C
5. Stay off if it's previously S5
Change-Id: I86aa0fe6e403bcbacfe396997d897111ffcf8e74
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/706251
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The reset line for the parade TCPC on port 1, has an external 1k pull
up resistor. However, the gpio.inc description for this line was set
to ODR_LOW which results in a short reset pulse. This can lead to an
external charger seeing an unattach event and dropping VBUS. On some
Coral systems with certain chargers this results in a continuous
reboot loop when no battery is connected.
Changing the default state of this line to ODR_HIGH prevents reset
from being pulled low until the EC is intializing the TCPC and fixes
the continous reboot loop issue when no battery is connected.
BUG=b:68226308
BRANCH=coral
TEST=Using Robo system tested with the Lenovo Type C charger and
verified that the system can boot up without a battery when connected
to port 1. Bitland also verified this change in their test setup and
found no failures.
Change-Id: Ia16fe8cf770dc91da479497d234a2b6f9679b878
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/762066
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
There are two Type-C ports and a DC Jack on GLKRVP. Added code
to allow system to boot from DC Jack also. This helps to boot
the device without Type-C connector during early stage of
software development.
BUG=b:69005234
BRANCH=glkrvp
TEST=GLKRVP can boot to OS without battery and DC Jack attached.
Also VBATA is set to battery voltage max.
When DC-Jack is present Type-C port is not enabled and
vice-versa.
Change-Id: I0fe5631c40490c56fba6ed5f3ad7ba7f5248460a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/757874
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
attenuation_factor is set to 1 because there is a calibration in iio
framework of kernel already which would be configured in the factory
flow.
BRANCH=None
BUG=b:69025351
TEST=Manually test on the DUT to make sure there is no additional
factor applied to raw data.
Change-Id: I25c5a3b341573bb82828164d3243f9adbac05372
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/759765
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
With this change, we can keep a PWM channel active during
low-power idle (EC deep doze).
BRANCH=none
BUG=none
TEST=The pwm channel is function normally in deep doze mode.
And tested pwm frequency setting are:
300, 250, 200, 150, 100, 50, and 10 (Hz)
Change-Id: Ie94cd96e819c869bdde6d7675d8f1a6cfc627f3b
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/752702
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The llama is a South American relative of the camel, though the llama
does not have a hump. These sturdy creatures are domestic animals used
by the peoples of the Andes Mountains.
BUG=None
TEST=`make buildall -j`
BRANCH=None
Change-Id: I55dbd8d5b0b14c41e27c4ef473833563f38878c3
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/761298
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Copied board-related files from scarlet folder and made edits to
fit rainier. Left in most battery related code and config since there
is enough logic to detect absent battery
BUG=chromium:776441
TEST=Run "make -j BOARD=rainier"
BRANCH=none
Signed-off-by: egemih@google.com
Change-Id: Ifd1201a9a44cebd9b433545f0ac7ee04741429c9
Reviewed-on: https://chromium-review.googlesource.com/755949
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Ege Mihmanli <egemih@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Tasks will no longer be scheduled before HOOK_INIT completion, so it's
no longer possible for the chipset task to notify HOOK_SHUTDOWN before
HOOK_INIT completes.
BUG=None
TEST=`make buildall -j`
BRANCH=None
Change-Id: I78349801738ff28fe9774df0c03296fe549dc9c9
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/759242
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Fizz blinks the power LED to alert a user when power supply isn't
enough. This patch makes the blinking speed twice as fast (on:1sec,
off:1sec).
BUG=b:37646390
BRANCH=none
TEST=Verify the LED blinks as intended.
Change-Id: I017eaf36b91d987f4b03308b1e9ac8781e5f217d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/757557
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Coral uses a 1 second delay to report battery being present to help
avoid VSYS glitches than can affect H1. On Eve, it was not expected to
remove and reconnect the battery while running. However, on Coral the
battery connector allows this action to take place.
Current if the battery is removed, when it's reconnected it can't
report as present because the timer_started flag is not being
reset. This CL checks for the case where the battery is not present
after being present and uses that as a trigger to reset the
battery_report_present_timer_started flag.
BUG=b:66923031
BRANCH=coral
TEST=While Coral unit has battery and ext AC connect, remove the
battery connector. Verifed the console log showed that this condition
was caught. Waited about 10 seconds, then reconnected battery and
verified that it reports as present.
[52.778818 Battery was present, but is now removed]
[60.211048 battery will now report present]
[60.217801 Battery FET: reg 0xe000 mask 0x4000 disc 0x0000]
[60.711195 battery woke up]
Change-Id: I41ae8c1b04a56697d20d3037b94189aff778fc4d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/754025
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Fizz has no battery, so any port / ILIM selection logic that could lead
to de-powering the device should be relaxed.
BUG=b:68953563
BRANCH=None
TEST=Boot fizz with both zinger and barrel charger, verify no panic /
brownout occurs.
Change-Id: I3bf353f5a26fe6210c67f8ee3f785012d4c063f0
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/756924
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
gcc 6.3 (as provided by coreboot-sdk) needs that to know which code
paths end early.
Also add a loop after the command that is "supposed" to reset the
machine so that the compiler believes it (and in case that assumption
fails).
BRANCH=none
BUG=b:65441143
TEST=none
Change-Id: Idb87253ec7880d66ffec30d75f4d007f02f63aab
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/742916
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
The bd9995x driver was written to allow any PD port # to be VBUS or VCC,
but the mapping is broken in a few places. Since all boards use VBUS =
port 0, remove the conversion entirely.
BUG=chromium:781849
BRANCH=kevin
TEST=Verify PD and BC1.2 charging still works on kevin.
Change-Id: I3687866835d1684342d9f746d91b3a6079ab5cc4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/755000
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Since poppy provides a custom battery present hw gpio, enable the
config option CONFIG_BATTERY_HW_PRESENT_CUSTOM.
BUG=b:65864825
BRANCH=None
TEST=Verified that when AC power is provided without battery present,
then EC auto powers up the AP. THis is essential for factory
testing. However, in order to make this work, CONFIG_SYSTEM_UNLOCKED
needs to be disabled. Verified device boots reliably after hardware
and software battery cutoff.
Change-Id: I9da1c68dfca3fd8c76570c78259adf42bf52522f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/752686
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Charge port / current selection often needs to be significantly altered
when a battery cannot provide sufficient charge, so have charge_manager
initially enter safe mode. After a battery with sufficient capacity has
been identified, charge manager will leave safe mode, and port / current
selection will return to standard rules.
BUG=chromium:777596
BRANCH=None
TEST=Pass charge_manager unit tests. On kevin, remove battery, attach
Apple PD charger, verify safe mode is not exited and device does not
brown out. Hot-plug battery and verify safe mode is exited. Next,
remove battery, attach to Samus, verify safe mode is not exited and
device doesn't brown out. Hot-plug battery, verify that safe mode is
exited and no active charge port, due to dual-role exclusion.
Change-Id: I7784865750087a037aad8dbbac058b22c77ba6d4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/733954
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Ensure GPIOs are inputs when read: Initialize GPIO direction on startup,
and clean up register accesses using reg names rather than magic numbers.
Add board version reporting with CONFIG_BOARD_SPECIFIC_VERSION.
BUG=None
BRANCH=servo
TEST=version is correctly 3
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: Ia04b01932fc36540af64b48b5e0bb6516f1529e2
Reviewed-on: https://chromium-review.googlesource.com/749693
Reviewed-by: Shawn N <shawnn@chromium.org>
Most boards had an identical implementation for this function,
previously known as board_is_consuming_full_charge(). To reduce copy
paste, let's just move it to common code. Boards that charge ramp
without a battery will have to define their own implementation, but
there probably won't be any boards like that in the near future.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: Ic99a378ac26dfd35d7d718bf9376eacfa8609166
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/748919
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Robo's LED spec is Red <= 5%, Orange 6 < SOC < 97, Green >=
97%. However, the table had Orange and Green flipped. This CL corrects
that error.
BUG=b:64192049
BRANCH=coral
TEST=Used EC console battfake command to verify that charge LED color
is red until 5%, then orange until 94%, and green after that. Note the
94% limit is due to the define CONFIG_BATTERY_LEVEL_NEAR_FULL which is
set to 94 as that's when the battery will want charging again after
reaching 100%.
Change-Id: Ia8395d6ca28ab000e12fb7a43f13721c7959e35d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/748971
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Now that chipset suspend/resume hooks are called only once per S0ix
entry/exit, move the calls to enable/disable PMIC VR decay to
suspend/resume hooks.
BUG=None
BRANCH=None
TEST=Verified that PMIC VR decay enable/disable are called only once
during one S0ix entry/exit.
Change-Id: Ie01c083963efeacaf0092927f5778b7c1cebf74f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/745981
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Bump up port80 buffer size to 256.
BUG=None
BRANCH=None
TEST=Verified that all port80 messages from a boot-up or S3 resume are
present in port80 history buffer.
Change-Id: I76c95f308eaa30cc3789b93e59235a2dac0f632f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/747121
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
