Commit Graph

7 Commits

Author SHA1 Message Date
Vadim Bendebury
1b53f74664 cr50: code modifications to support FPGA B1
The new FPGA version adds a lot of few features, while temporarily
cutting off some existing capabilities like clocking configuration
(hardwared clocks used instead), pinmux assignment for SPS interface
(hardwared connections used), etc.

This patch removes some now unused code, modifies some configuration
items and adds TODO_FGPA comment blocks highlighting code which needs
to be reviews next time FPGA version changes).

The new register definitions file is derived from hardware
description.

BRANCH=none
BUG=chrome-os-partner:43791
TEST=with these changes in place the B1 board boots to the console
     prompt.

Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291855
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2015-08-11 02:58:45 +00:00
Vincent Palatin
dd573030d2 g: update version string
Build the hardware version string from the register definitions,
so I no longer forget to update it.
Check it at runtime against the build version registers.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=On the console command line,
type "version" and see the following string:
"Chip:    g cr50 A1 20141203_224409"

Change-Id: I6d902780d42f2dd18a57ccc08fd4ba4fee5ebc7c
Reviewed-on: https://chromium-review.googlesource.com/233582
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:51 +00:00
Vincent Palatin
4ef1969a50 g: update reset code
- record and display reset cause
- add the hard reset option
- add the scratchpad to store values across reboots.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:33818
TEST=On the console command line, chech the "[Reset cause: xxx]" string
- for the initial reset cause
- use "waitms 4000" to trigger a watchdog reset
- use "reboot soft"
- use "reboot hard"
The "utils" test is now building and passing.

Change-Id: I68c7096e5b7bfd102be89fd8eef6fe20da37a6f8
Reviewed-on: https://chromium-review.googlesource.com/233581
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:41 +00:00
Vincent Palatin
2777252a20 g: add core reset
Until we implement a proper reset of the microcontroller,
add a reset of the Cortex-M3 CPU core in system_reset() in order to
avoid getting stuck in a weird loop if we get a panic.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=trigger a data abort and verify we are not going into a panic loop.

Change-Id: Ie046379e6a9469bd683fa774cdc9abb10a14e8f1
Reviewed-on: https://chromium-review.googlesource.com/233109
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2014-12-04 20:44:56 +00:00
Bill Richardson
806ba91ea4 Cr50: Update/refactor for new HW release
This is fairly large change set to accomodate a new hardware
release. There are enough differences to require refactoring the
registers.h file. Autogenerated constants are now in gc_regdefs.h
and all constant names begin with GC_, while register names are
defined in registers.h and begin with GR_.

Yes, I know the new header files are wider than 80 chars, but we
agreed that was okay in some cases if it makes them more readable
(see commit 3500c28).

BUG=chrome-os-partner:33423
BRANCH=none
TEST=make buildall -j

Build and run on the development board.

Change-Id: I21bd88c490f4f359ad17b5af9d17d8caca8dc9e4
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/230513
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
2014-11-18 23:52:08 +00:00
Bill Richardson
f154a8b95d cr50: Update TODO comments with new bug numbers
Just changing comments, no code.

BUG=chrome-os-partner:33432
BRANCH=none
TEST=make buildall -j

Change-Id: Ibffda40bff23a8c685feaef30a85e19157566245
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229860
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2014-11-14 23:56:44 +00:00
Bill Richardson
86c7e2e90a Add initial support for cr50 SoC
The serial console works. Nothing else is implemented yet.

BUG=none
BRANCH=ToT
TEST=make buildall -j

To build,

  make BOARD=cr50 hex

Testing the result requires a development board. I have one. It
works with HW revision m3.dist_20140918_094011

Change-Id: I718d93572d315d13e96ef6f296c3c2796e928e66
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226268
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2014-10-31 22:32:50 +00:00