Commit Graph

602 Commits

Author SHA1 Message Date
Gerrit
512ff9b95e Merge "Sort console commands at build time" 2012-05-15 09:18:05 -07:00
Louis Yung-Chieh Lo
be7b5b44a3 Add chipinfo string for LM4FS1GH5BB.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>

BUG=chrome-os-partner:9625
TEST=test on link.
(EC console) > chipinfo
Chip vendor:   ti
Chip name:     lm4fs1gh5bb
Chip revision: A3

(VT2) % ectool chipinfo
Chip info:
  vendor:   ti
  name:     lm4fs1gh5bb
  revision: A3

Change-Id: I5f18ee068f4d5d64a51933fa3cc69d45b18ecaf3
2012-05-15 10:32:17 +08:00
Vincent Palatin
33b03d5a39 Sort console commands at build time
Use the linker to sort console commands by name,
this saves execution time and memory.

BUG=none
TEST=generate several images with 5N, 5N+1, 5N-1 commands and check the
output of the "help" command.

Change-Id: Ib5d8f3bca726621c68ab152f4fa662cee355abb1
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
2012-05-15 01:32:44 +00:00
Gerrit
35b1b7bf90 Merge "Arrange help output to sort 'column first'" 2012-05-14 18:23:22 -07:00
Vadim Bendebury
336944e951 Arrange help output to sort 'column first'
Sort the command name index, and then print them in file columns (as
before), but ordering columns first. This makes it much easier to
examine the 'help' command output.

BUG=none
TEST=manual
  . program the new image
  . execute the 'help' command
  . observe output printed sorted 'columns first'

Change-Id: I7b15cef09a61fe20eb4ba5ee274ba1d72063f1c0
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
2012-05-14 17:44:45 -07:00
Gerrit
dc703b5ae4 Merge "Slightly update the host commands API" 2012-05-14 17:27:49 -07:00
Gerrit
e00c460c93 Merge "Change polarity of PROCHOT signal to match EVT" 2012-05-14 16:39:20 -07:00
Vincent Palatin
87d3707f62 Slightly update the host commands API
Preparatory work to use common host command code between ARM and x86.

Every command sends back explicitly the size of the response payload.
The size of the response defaults to 0 ond can be updated.

Add a protocol version number returned as command 0x00 to help with
backward compatibility.

move a couple of function from lpc specific header to host commands to
be able to implement them for the I2C link.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:9614
TEST=make BOARD=link

Change-Id: I6a28edf02996ddf6b7f32a3831d07d5f0271848f
2012-05-14 23:33:21 +00:00
Randall Spangler
a59178373a Change polarity of PROCHOT signal to match EVT
This would throttle proto1 systems, if it weren't for a HW bug which
means we don't have prochot control over proto1 systems at all.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8982
TEST=system still boots

Change-Id: Ie42c034141f24795ec2bfee592e194001d3cd174
2012-05-14 16:07:17 -07:00
Randall Spangler
08e7b3a516 Fix charging task running too frequently
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST=taskinfo; note that number of IRQ8 (I2C0) exceptions goes up more slowly

Change-Id: Ib93aaab80fdd19b7a35aec43903393baf506f2e8
2012-05-14 15:32:13 -07:00
Gerrit
805299d838 Merge "Add #define CONFIG_NO_RW_B for stm32f100" 2012-05-14 15:27:40 -07:00
Gerrit
d296c0d246 Merge "Allow console commands abbreviation" 2012-05-14 14:40:44 -07:00
Gerrit
e9f4bf29c1 Merge "Extract A and B images from signed EC binary for openocd macros" 2012-05-14 14:40:43 -07:00
Vadim Bendebury
6a324c1de5 Allow console commands abbreviation
The EC console input handling code is being enhanced to accept
abbreviated command names.

If the abbreviation is unique, the appropriate command is used, if the
abbreviation is ambiguous, the command is handled as nonexistent. The
error message is being modified to mention that the command either
does not exist or is ambiguous.

This change also makes it impossible to have command names matching
the beginning of other command names. Two such cases are being fixed
(`ch' renamed to `chan' and `thermal' renamed to 'thermalconf').

BUG=none
TEST=manual
 . program the new EC image. Try entering at the console:
  > h
  Command 'h' either not found or ambiguous.
  Command returned error 1
  > he
  Known commands:
    adc            autofan        battery        ch             charger
  ...
  > help
  Known commands:
    adc            autofan        battery        ch             charger
  ...

Change-Id: Iaa3e91e1504e42daefb02d561e00c39003548197
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
2012-05-14 13:35:03 -07:00
David Hendricks
214e6b6017 Add #define CONFIG_NO_RW_B for stm32f100
We don't actually use image B for boards with the STM32F and there is
no longer enough space for it.

BUG=none
TEST=locally compiled for Snow

Change-Id: Ic668c718feaef4cf808869474dc05e45a5f7290c
Signed-off-by: David Hendricks <dhendrix@chromium.org>
2012-05-14 12:34:32 -07:00
Randall Spangler
df38373a5f Extract A and B images from signed EC binary for openocd macros
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST=build, then flash_link_a from openocd telnet session

Change-Id: If922f54adb4684e27a38ed87348111bd9047535d
2012-05-14 10:46:16 -07:00
Simon Glass
f783aee46f daisy: Refactor the power task
Add a set of functions to deal with power on/power off, and checking
the power button. Then use these functions in a new top-level power
control loop.

This implements the following features:

- Cold reset powers off the AP

When powered off:
- Press pwron turns on the AP
- Hold pwron turns on the AP, and then 16s later turns it off and leaves
it off until pwron is released and pressed again

When powered on:
- The PMIC PWRON signal is released one second after the power button is
released (we expect that U-Boot as asserted XPSHOLD by then)
- Holding pwron for 8s powers off the AP
- Pressing and releasing pwron within that 8s is ignored
- If XPSHOLD is dropped by the AP, then we power the AP off

BUG=chrome-os-partner:9424
TEST=very ad-hoc:
1. build and boot on daisy, flash U-Boot with USB using
'cros_bundle_firmware -w usb', inserting daisy
USB cable when it says 'Reseting board via servo...'
2. Press cold reset, then power on, see that it powers on
3. Then hold power-on for 8 seconds and see that it power off
4. XPSHOLD function not tested yet (this should work in Daisy 2)

Change-Id: Ie471af0b4e690de7d6340e47e148c8ce3cda94f3
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-14 09:12:50 -07:00
Simon Glass
55898c8b4b daisy: Deal with no-timeout explicity in wait_in_signal()
This function accepts a timeout value of -1, so add a comment to that
effect. Also make it deal with this explicitly since the current function
seems to return prematurely in that case.

BUG=chrome-os-partner:9424
TEST=very ad-hoc:
1. build and boot on daisy, flash U-Boot with USB using
'cros_bundle_firmware -w usb', inserting daisy
USB cable when it says 'Reseting board via servo...'
2. Press cold reset, then power on, see that it powers on
3. Then hold power-on for 8 seconds and see that it power off
4. XPSHOLD function not tested yet

Change-Id: I01bd81997836333ca33e61d48823e8ff41034d5f
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-14 09:12:50 -07:00
Simon Glass
fddbc9edc4 timer: Allow callers to pass 'now' to timestamp_expired()
To avoid calling get_time() when the caller already knows the value, add
a parameter to timestamp_expired().

BUG=chrome-os-partner:9424
TEST=build and boot on Daisy

Change-Id: Ibb97c86f429ec4b814e17b41cbf79b612a75097a
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-14 09:12:50 -07:00
David Hendricks
fb0d6f078d stm32: add missing init hook
This adds a missing init hook

BUG=none
TEST=Tested on Snow

Change-Id: I4571d5bddf415b06e27e5e9eaadbb6017bde4bbe
Signed-off-by: David Hendricks <dhendrix@chromium.org>
2012-05-11 17:22:58 -07:00
Randall Spangler
27e8bdb7c0 Maintain timer value across sysjumps and clean up init debug output
This helps us keep track of how long vboot is taking on the EC.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9651
TEST=reboot system and look at debug log.  time shouldn't start over after it jumps to image A.

Change-Id: Iad86e90d42dabf1c67b2c2be80dda1151cf9a288
2012-05-11 13:36:34 -07:00
Randall Spangler
2f2a5d9022 Call timer_init() before other interrupts are initialized
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9647
TEST=hack code to put a uart_puts() immediately following uart_init()
It shouldn't crash.

Change-Id: Ia1867a631934dbd457a23183010fdf9f5c284873
2012-05-11 12:29:59 -07:00
Bill Richardson
4df4b8938e Add LICENSE file to project
It's the standard Chromium OS BSD-style license. I just copied it from
vboot_reference.

BUG=chrome-os-partner:9085
TEST=none

Change-Id: Ib8b77e9544d199fa809caaae0be9c0903c169fd5
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-05-11 09:11:52 -07:00
Bill Richardson
8101b71316 Enable verified boot for EC firmware
BUG=chrome-os-partner:7459
TEST=manual

In the chroot:

  cd src/platform/ec
  make BOARD=link

The firmware image (build/link/ec.bin) is signed with dev-keys. Reflash the
EC and try it, and it should verify and reboot into RW A.

Additional tests (setting USE_RO_NORMAL, poking random values into VBLOCK_A
or FW_MAIN_A to force RW B to run, etc.) are left as an exercise for the
reader. I've done them and they work, though.

Change-Id: I29a23ea69aef02a11aebd4af3b043f6864723523
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-05-10 17:27:36 -07:00
Gerrit
058079977e Merge "Use open drain reset signals, and clean up signals to 5VALW-powered devices" 2012-05-10 16:25:39 -07:00
Randall Spangler
f28f2b2e51 Use open drain reset signals, and clean up signals to 5VALW-powered devices
Open drain cleanup minimizes leakage and signal glitching on shared
reset/signal lines, and is tidier than explicitly switching the
signals between inputs/outputs.

Touchscreen and lightbar are powered by +5VALW so their signals need
to be dropped when +5VALW is off to avoid leakage, and so they see a
clean reset signal when they're powered up.

Moved +5VALW power-on to S5-S3 transition, to minimize power draw in
S5.  This also ensures that 5VALW-powered devices get reset when the
device bounces through S5.  (No effect on proto1, where 5VALW is not
under EC control.)

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9172
TEST=boot and shutdown system; still works.

Change-Id: Ia4bf0703292a189c324ce283d1e79a33776ee40f
2012-05-10 15:17:01 -07:00
Simon Glass
9a5b4927c9 stm32: Add a generic gpio library
Much of the code in gpio-stmxxx.c is duplicated. Also the gpio_get_name()
function is not present in the new file.

Create a common gpio.c file to hold this function, and hopefully other
code in the future.

BUG=none
TEST=build on all platforms, boot on daisy

Change-Id: I4ab33e0e5c52843b770fabc777c917493abccffe
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-10 14:16:07 -07:00
Simon Glass
8d48971e91 daisy: Disable keyscan messages
These messages are unnecessary and seem to hang the EC for a while.
Punt them for now.

BUG=none
TEST=build and boot on daisy; see that keyboard still works, and messages
do not appear

Change-Id: I62963b62eb3e7cee86162784f364d7b1da37f631
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-10 14:16:07 -07:00
Simon Glass
f8f5599178 Allow boards to set the default console mask
Some boards don't like to have every keyboard scan printed, but some
devs find this info comforting. Add a way for boards to select the
require console mask.

BUG=none
TEST=manual:
build and boot on daisy, see that key scan messages are suppressed.
build on all platforms

Change-Id: I8e6e640eaabc0a08e5427cd97f7089dda1238025
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-10 14:16:07 -07:00
Gerrit
ee12df8c28 Merge "Fix truncated output from 'ch' command" 2012-05-10 13:44:28 -07:00
Randall Spangler
013a930082 Fix truncated output from 'ch' command
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST='ch' - prints all the channels now

Change-Id: I38ebc3eed2476c44c26fc00d6ea79800ae427722
2012-05-10 12:41:50 -07:00
Simon Glass
906411de93 daisy: Remove start-up message from keyboard scan
Remove the start-up debug message which otherwise ends up being the
first thing displayed on boot, ahead of the banner.

BUG=chrome-os-partner:9424
TEST=very ad-hoc:
1. build and boot on daisy, flash U-Boot with USB using
'cros_bundle_firmware -w usb', inserting daisy
USB cable when it says 'Reseting board via servo...'
2. Press cold reset, then power on, see that it powers on
3. Then hold power-on for 8 seconds and see that it power off
4. XPSHOLD function not tested yet

Change-Id: I4f057ad32c3a857851d02935286683ea87dc7cd1
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-10 12:37:42 -07:00
Vic Yang
85e734d1b4 Adjust fan speed control thresholds
This CL set higher temperature thresholds for CPU temperature to reduce
fan noise. Also set temperature thresholds for case temperature so that
we can adjust fan speed according to them.

Signed-off-by: Vic Yang <victoryang@chromium.org>

BUG=chrome-os-partner:8982
TEST=Manual

Change-Id: I16a74e10af4583a59065c09e8d9538232b0fb157
2012-05-10 15:25:36 +08:00
Randall Spangler
30a33e6b04 Drop DPWROK when system is off for more than 10 sec
This saves ~70mw of power.

To make this work, I also had to stretch the power button signal to
give the system a chance to come back up when the user taps the power
button.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9574
TEST=manual

For each of the following tests, wait ~15 sec after the system is
powered off to give it a chance to drop DPWROK.

1) tap power button -> system turns on
2) hold power button 1 sec -> system turns on
3) open lid -> system turns on
4) silego reset (power+refresh, or power+esc on proto1) -> system stays off
5) silego recovery (power+esc+refresh) -> system turns on
6) hold down power button and type 'reboot' on EC console -> system turns on
7) type 'powerbtn' on EC console -> system turns on

Change-Id: I781cf3e665104192521b7fb9ff75a3c3e7f43464
2012-05-09 16:54:17 -07:00
Randall Spangler
1655c8727a Add hooks for chipset power transitions
This is cleaner than having x86_power explicitly know about everything
else in the system that cares about power transitions.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST=boot and shutdown system; still works.  Mouse powered to system is off in S5.

Change-Id: Ib673ca2d9edd5473334e7604e98b99b02b768419
2012-05-09 16:09:10 -07:00
Randall Spangler
33422ee341 Fix polarity of radio-disable GPIOs
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:8932
TEST=manual

1) gpioget with system off -> ENABLE_WLAN = 0, RADIO_ENABLE_* = 0
2) gpioget with system on -> ENABLE_WLAN = 1, RADIO_ENABLE_* = 1

Change-Id: I397a195b4539083c622b85d63703c334cae931fb
2012-05-09 16:07:26 -07:00
David Hendricks
d8872b6cb7 stm32: set default i2c mode to noop
This CL initializes the default transmit mode for I2C to CMDC_NOP.

When we introduced the protocol, we changed the default mode to send
message protocol version. This didn't take into account that U-Boot's
probe command (and probably other userspace commands) do a single-byte
read to probe. So when the probe was asking for a single byte, by
default we were sending multiple bytes for the version message.

This CL also makes the EC reset the mode to noop after each EC-to-AP
transmission. This will help ensure that the EC ends up in a known
state e.g. if the system is reset. That will require the AP to set the
mode before requesting any real data, but that's how we do things now
anyway.

BUG=chrome-os-partner:9556
TEST=Tested on Daisy.

Tested by running "i2c dev 4; i2c probe" at U-Boot prompt, booting
system, and typing on keyboard. Everything seems to work okay.

Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: I0849c94588a9a60ade657af8f941f7267553e316
2012-05-09 13:29:13 -07:00
Gerrit
9b169ce929 Merge "stm32: add flash programming support" 2012-05-09 11:41:04 -07:00
Randall Spangler
8403121f21 Make CPU_PROCHOTn high-Z (input) unless we're driving it low.
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9563
TEST=manual

Measure +3VALW power before and after change with system in S5.  Should drop by ~50mW.

Change-Id: I264694a80b2e558e46708de6ab1bfb146f79eb68
2012-05-08 21:07:33 -07:00
Randall Spangler
3919472023 Change recovery key to ESC on EVT systems
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9554
TEST=manual

1) Boot system.  No recovery.
2) Boot system holding down Refresh+Esc.  No recovery.
3) Hold down Power+Esc.  System reboots and stays shut down.
4) Hold down Power+Esc+Refresh.  System reboots into recovery mode.

Change-Id: I53db224b6d2a03406244e79fb64fb67851919857
2012-05-08 21:07:09 -07:00
Randall Spangler
8ea7983c29 Add gpio_set_flags() and system_get_board_version()
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:9117
TEST=version; board version should be 0 on proto1 and 1 on EVT

Change-Id: Ic64ad0d009151fbda09f5c1605ef50ae708cb6ae
2012-05-08 21:00:38 -07:00
Gerrit
2615d8cdae Merge "Automatically switch USB charging mode" 2012-05-08 20:27:50 -07:00
Vic Yang
527eddedaa Automatically switch USB charging mode
Disable USB ports when system is down and set USB ports to standard
downstream mode when system is up or sleeping.

Signed-off-by: Vic Yang <victoryang@google.com>

BUG=chrome-os-partner:9249
TEST=Plug in a phone and see it charge when system is on.
Turn off the system and see it stop charging.

Change-Id: I02850dee7051ed6589e0f176a933069203f0efdf
2012-05-09 10:15:03 +08:00
Vincent Palatin
71c86b38c3 stm32: add flash programming support
Implements the on-chip flash erasing and writing functions.

The actual writing is done from a routine in internal RAM (using the
special .iram.text section) with interrupt disabled as we cannot read
flash during the writing process.

The write-protect feature is only lightly tested.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8865
TEST=run on Daisy, from the EC console, use flasherase and flashwrite
commands and observe the results using rw command.

Change-Id: I4c64cf28b23df52b18500b42a32a7d3668d45ba6
2012-05-09 01:13:26 +00:00
David Hendricks
a2efa4472a stm32: Fix an off-by-one error in select_column()
This fixes an off-by-one error that was preventing two keys
(left and right arrow) on output 12 from being driven properly,
and causing some other weird ghosting effects.

BUG=chrome-os-partner:9516
TEST=Tested on Daisy

Pressing the right arrow shows this at the EC console:
[1 keys pressed:  -- -- -- -- -- -- -- -- -- -- -- -- 40]
and pressing the left arrow shows this at the EC console:
[1 keys pressed:  -- -- -- -- -- -- -- -- -- -- -- -- 80]

Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Ib7af21444c2d03a0787fb1a28b520a779013774d
2012-05-08 17:06:17 -07:00
Gerrit
87b4278299 Merge "Move gpio list into gpio.h header file" 2012-05-08 14:39:37 -07:00
Bill Richardson
468bc6171c Add LPC lightbar command to get the current sequence.
Instead of making the STOP command synchronous, we can just have the
host-side app tell the EC to stop, then poll until it has.

BUG=chrome-os-partner:9349
TEST=manual

"make BOARD=link", then
copy build/link/util/lbplay to the host and run it.

Change-Id: I846924ae7994a498e0089197785cf239898fe2a3
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-05-08 12:03:49 -07:00
Simon Glass
42842e4378 Move gpio list into gpio.h header file
This is referenced by various files, so should be in the gpio.h header.

BUG=none
TEST=manual:
build and boot on daisy, see that USB download still works
build on all platforms

Change-Id: If579c975ef6c82988b9e411eeaa97c950d9efce4
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-05-08 11:31:52 -07:00
Bill Richardson
4679f8f194 Mark end of each RW firmware image so we can find it.
This just adds a single byte to the end of the RW firmware, so that we can
scan backwards from the end of the reserved block, skipping 0xff until we
find the actual firmware size. We need this so we can resign existing
firmware images without either signing a bunch of padding or forgetting to
sign a trailing 0xff that might be important.

BUG=chrome-os-partner:7459
TEST=none

Change-Id: If5cadb4d58c1bce39f66815c328ffd18cc3d444b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-05-08 08:49:52 -07:00
Louis Yung-Chieh Lo
468e34d51d Add EC_RO/EC_RW and WP_RO FMAP area for fw_updater and factory.
EC_RO and WP_RO area are identical and should cover whole range needed to
be write-protected. While EC_RO is for legacy firmware updater, the WP_RO
is for future factory finalize test.

EC_RW is for fw_updater to update both A/B at once.

Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>

BUG=chrome-os-partner:9536
TEST=build in chroot and dump_fmap build/link/ec.bin
opened build/link/ec.bin
hit at 0x00013800
fmap_signature   __FMAP__
fmap_version:    1.0
fmap_base:       0x0
fmap_size:       0x0003f800 (260096)
fmap_name:       EC_FMAP
fmap_nareas:     16
area:            1
area_offset:     0x00000000
area_size:       0x00014000 (81920)
area_name:       RO_SECTION
area:            2
area_offset:     0x00000000
area_size:       0x00013000 (77824)
area_name:       BOOT_STUB
area:            5
area_offset:     0x00013800
area_size:       0x00000302 (770)
area_name:       FMAP
area:            7                    <----
area_offset:     0x00000000           <----
area_size:       0x00014000 (81920)   <----
area_name:       EC_RO                <----
area:            8                    <----
area_offset:     0x00014000           <----
area_size:       0x00028000 (163840)  <----
area_name:       EC_RW                <----
area:            9                    <----
area_offset:     0x00000000           <----
area_size:       0x00014000 (81920)   <----
area_name:       WP_RO                <----
area:            10
area_offset:     0x00014000
area_size:       0x00014000 (81920)
area_name:       RW_SECTION_A
area:            14
area_offset:     0x00028000
area_size:       0x00014000 (81920)
area_name:       RW_SECTION_B

Change-Id: I11b9450f87e26ef1cd0ac65ecd059e13d8489e26
2012-05-08 14:51:34 +08:00