Replace ADC-based board version with CBI/EEPROM board version. This will
cause all of the existing boards to report -1 (or 65535) as their
board version until you can update it from the kernel.
To set your board version to 0 run the following command in
the AP console when WP if off (e.g. battery removed)
$ ectool cbi set 0 0 1 2
BRANCH=none
BUG=b:77551185,b:77900842
TEST=wrote to cbi from ap console and verify flash state on
ap and ec console
Change-Id: I03987cc89ca4c14580dcf61de23780fe5304663b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1008832
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Currently we only support the Acer LG and Panasonic battery. There is
a 3rd Acer battery type that Quanta could be providing us with for
Yorp proto boards. This CL adds support for the Sanyo battery.
BUG=b:74132235
BRANCH=none
TEST=verifed that when connected to Sanyo battery that the battery is
reported as present.
Change-Id: I1810da59866795e93340163216412441be098795
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1011557
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This CL adds support to check if the OCM flash is erased and if not,
will erase it at initialization time. These changes are encapsulated
in a new config option CONFIG_USB_PD_TCPM_ANX7447_OCM_ERASE and this
option is enabled for Yorp boards.
BUG=b:77658388
BRANCH=NONE
TEST=make -j buildall. Tested on a board that hadn't yet been
erased. Verifed the message
"anx7447: OCM flash checked and successfully erased"
was in the EC log, but did not show up on subsequent reboots.
Change-Id: I660e76a9498d3dc1ba821a04317b324f716c5089
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/988414
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Since there are known issues with ANX7447 driver to work
reliably in low power mode, disable DRP_AUTO_TOGGLE option
since TCPC_LOW_POWER mode config and this one should be disabled
together.
BUG=b:77544959
BRANCH=None
TEST=On yorp; on port 0 and 1 test without and with battery boots up.
Please note with battery we may still need to press power button to
get the SoC to boot up to S0 b:76230069.
Detaching the Type-C charger with battery connected also shuts down
the system which is a known failure b:77606986.
Change-Id: I1b744cd9aa063328845f9a1cc7e36d291dfec9f5
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1007629
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This code enables alternate mode path for
DP for both TypeC ports.
BUG=b:77496487
BRANCH=None
TEST=On yorp; check if the mux is set correctly
for DP use cases. When PD message for hot plug is received
by EC, EC (write register) ---> TCPC (GPIO) ---> SoC,
and display comes up with both ports.
Change-Id: Idfd0f85dc02a04adb266f2755a6d68dcb20141f8
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1003330
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Port 0 uses the Anx7447. This CL updates the tcpc config to use the
Anx7447 driver instead of the Anx74xx driver.
BUG=b:74127309
BRANCH=NONE
TEST=make -j BOARD=yorp and verified that when connected external type
C charger to port 0 it reaches SNK_READY
Change-Id: I96967a1d272fcda079280ba6d2f0eb5ed8e3dd7f
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/982894
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Enable trackpad power when chipset is in S0 state. Keep
it disabled in other states.
BUG=b:73137125
BRANCH=master
TEST=On Octopus, kernel logs show ELAN enumerated
Change-Id: Ie1fd8ab777e82d900418127b4efee29fe65d1423
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/984405
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This CL adds required code to the tcpc_alert_event() and
tcpc_get_alert_status() functions. In addition, it adds
board_tcpc_init().
The ANX7447 does not have an EC controlled reset line. Other than that
modification the actions taken in tcpc_alert_event and
tcpc_get_alert_status are the same as what's been done of previous
projects using these TCPCs.
board_reset_pd_mcu still needs to be implemented, but is not related
to the tcpc_alert_event() and tcpc_get_alert_status() functions. Also,
at this point ANX7447 is not supported as that depends on the driver
landing.
BUG=b:74127309
BRANCH=none
TEST=Verifed that with external charger that USB PD state machine
advances to SNK_READY state. Note that port 0 does not work at all in
this version.
Change-Id: Ib887b4dba6bacb4b3fb6e03f634362e1c3aa4da2
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/982518
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This is helpful during early debugging to identify if the EC is up and
running. This will be later cleaned up as part of LED support for
yorp.
BUG=b:74952719
BRANCH=None
TEST=Verified that blue led glows up on booting up EC.
Change-Id: I4670c210045c649a926e7c3f23c5d6097df69e3d
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/979270
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Since all of the uses of CONFIG_USB_PD_TCPM_ANX74XX are actually for
ANX3429, rename the option especially since the ANX7447
driver will not reuse the ANX74XX driver which is being introduced
in CL:956790.
Also adding the CONFIG_USB_PD_TCPM_ANX740X and
CONFIG_USB_PD_TCPM_ANX741X options to advertise which versions of the
ANX chip the anx74xx.c driver applies to.
BRANCH=none
BUG=chromium:824208
TEST=build all
Change-Id: Ib47f4661466e54ff2a0c52d517eb318d3bfd25a2
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/973558
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The NPCX driver doesn't use anything but >= 0; make everything
consistent as to not imply something is different between UART and
everything else.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ib98f56f7004df2405df7d2cc1847f1ed4b3ec558
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/976524
Reviewed-by: Edward Hill <ecgh@chromium.org>
This CL fills out the ppc_chips and config options required to support
the NX20P3483 PPC. On Yorp for port 0 SNK/SRC control is driven by the
TCPC, while on port 1 it's driven by the EC.
BUG=b:74206647,b:74127309
BRANCH=none
TEST=make -j BOARD=yorp and verify there are no errors.
Change-Id: I41920be0bf4d9232101d8e1840714ca0c70f1bc5
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/966927
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Geminilake uses the same power sequencing code as Apollolake. Instead
of the board specifying the wrong chipset, we will make the correct
chipset reuse the existing power code.
This also gives us flexibility in the future if GLK needs to vary from
ALK in any of shared code.
BRANCH=none
BUG=b:74020444
TEST=build all
Change-Id: Icd00286ac4f0612d1bda56677c4141957480c6bf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969613
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This CL introduces /baseboard to the EC project which can contain
config options and code which is specific to certain family, but can
be shared among the board derivatives of that family. Only the
infrastructure changes are included with an empty baseboard.c/.h for
octopus.
BRANCH=none
BUG=b:74358864
TEST='make buildall' and ensure that all boards build successfully. In
addition, temporarily moved config options for USB-C and charger to
baseboard.h and tested that 'make BOARD=yorp' is successful.
Change-Id: I16656574f835c56598a9d2bf49bc1e946d71fe76
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/954444
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
yorp measures each port's vbus separately on a deticated ADC.
Also, add config to take care of ADV_VBUS -1 case too.
BRANCH=none
BUG=b:74127309
TEST=none
Change-Id: I6f4df96caffc3b527b69e67358631dd448172cde
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956555
Reviewed-by: Edward Hill <ecgh@chromium.org>
