This fixes two bugs:
- The row order on the slave is reversed
- The last value is missed when transferring data to the master
BUG=None
TEST=Build and check the heatmap
BRANCH=None
Change-Id: Ic51ad1132d948ec6ec68dc673288ec6f29c6ebe7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200621
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Since stm32l has smaller flash size, undef CONFIG_CONSOLE_CMDHELP to
remove short descripton to save 2560 byes.
If you need to read the description, grep that in the code.
BUG=chromium:374575
BRANCH=tot,nyan
TEST=buildall and
% grep hey build/big/ec.RO.map
0x000000000000ef48
After shrink -->
0x000000000000e548
Change-Id: I856e89def6456607ade610134bf318d8522f5e4d
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200472
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
A single frame of the scanned heat map is too big to fit into RAM. Let's
encode it so that we can get the whole frame.
BUG=None
TEST=Touch on various places on the panel and see corresponding results.
BRANCH=None
Change-Id: I8c7c72d5d4a83ebc2018c0abd57075697c931bef
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199940
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Fix bug to get PD transmit working. Fix config bug
for reading the CC ADCs.
BUG=chrome-os-partner:28350
BRANCH=none
TEST=connect fruitpie and samus via USB-C and run
pd dev on samus and pd charger on fruitpie.
Change-Id: Ic981a1f1e621ef4b69dedc61a02751346274aa4e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200159
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When the supply output is enabled, ensure that we detect quickly any
over-current situation by setting an analog watchdog in continuous
conversion mode.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=plug an electronic load to Zinger and see the OCP triggered
quickly when we go above the current threshold.
Change-Id: I7da50ef242addbd2f4f48f624494daa321ac22b2
Reviewed-on: https://chromium-review.googlesource.com/199924
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Allow flashing the RW firmware by sending Vendor-Defined Messages over
the USB-PD link.
This is not the secure update whose design is still under discussion,
it's a simple update with integrity check.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28330
TEST=using the following CLs,
./util/flash_pd.py ./build/zinger/ec.RW.flat
and see Zinger booting on RW, repeat the operations with different
builds of the RW firmware.
Change-Id: Icd90eb92f7321ccd66341a50b9dabd73c59c68c1
Reviewed-on: https://chromium-review.googlesource.com/197948
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Enable clock to syscfg in order to write DMA remapping
registers in pre_init().
BUG=chrome-os-partner:28350
BRANCH=none
TEST=test on a samus board.
Change-Id: I71b7f9b2bdc45f138f404997ccde65f54a1125d0
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200039
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add PD MCU interrupt signal to gpio list, currently with a dummy
interrupt function which prints a message to let us know it is
occuring.
BUG=chrome-os-partner:28721
BRANCH=none
TEST=none
Change-Id: I1fab016b84b1abaced905e0ea0bd35dbd67b30bb
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199792
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Typically bq24xxx charging chip limits input current to minimum of
register value and ILIM pin. For fruitpie, the current limit will
be decided solely in software, and the hardware pin will be ignored.
BUG=chrome-os-partner:28611,chrome-os-partner:28311
BRANCH=none
TEST=Tested on fruitpie. Verified that current limit can be set
above the ILIM pin value of 500mA.
Change-Id: Ia687446f95f9d18fde9d2b4ebb0e1c093aebf885
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198940
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Ignore ILIM pin for charging which allows EC to set the input
current limit to anything it desires. This is necessary for
1.9 build because the hardware sets the ILIM to something
like 0.5A.
BUG=chrome-os-partner:28611
BRANCH=none
TEST=none
CQ-DEPEND=CL:198940
Change-Id: I43c57d0040e341e091ee36c97ec601d6bd174606
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199661
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
As per hardware team request, use a higher over-current limit to avoid
false positives due to measurement precision margin.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=use a Zinger connected to an electronic load and trigger the
protection.
Change-Id: If031f6f58b9b7119c6fa3fa3273c08f16cbbbebb
Reviewed-on: https://chromium-review.googlesource.com/199552
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Nothing looks at this except for an EC console command, so leave it at unity
gain until we've confirmed that it's working correctly.
BUG=chrome-os-partner:28721
BRANCH=ToT
TEST=make buildall
Change-Id: I81085743535f4664ac8bf1d016bb7562046ab49b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199243
Reviewed-by: Alec Berg <alecaberg@chromium.org>
There's a constant defined in board/samus/board.h that's only used in
board/samus/panel.c. Let's just put it in that file, so it doesn't clutter
up the config.
BUG=chrome-os-partner:28721
BRANCH=ToT
TEST=make buildall
Change-Id: I23d61aff16726a11a0408957cd109b49c3bf954c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199241
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The electrical design has changed :
the output enable GPIO (PF0) has switched from being the LM5050 shutdown
pin to controlling directly the FET enabling. We need to invert the
control logic and use it in push-pull mode rather than open-drain.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28332
TEST=plug a reworked Zinger to a firefly and check the firefly LED is
displaying a solid ON (meaning the voltage is right).
Change-Id: Iee79b07f49eade1fee7cac1986bc38ba21e04b25
Reviewed-on: https://chromium-review.googlesource.com/198240
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
ensure that the board will get power from VBUS by default, so it can
start-up if it's own battery is fully drained.
Also increase the console stack as the battery code footprint is growing
over time.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28311
TEST=plug a Fruitpie without battery to a Zinger.
Change-Id: I971040da9bedb7bf46363787a13220c39a78100d
Reviewed-on: https://chromium-review.googlesource.com/198557
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Detect over-current and over-voltage and trigger a fault.
The over-current threshold is 10% over 3A (3.3A).
Only currently implement the slow protection,
the fast interrupt-based one will be done later.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=with Zinger connected to an electronic load, adjust the current to
3.35A and see the output voltage cut.
Change-Id: I0e848192392fd73f0839d4bcb806528b2a6b9122
Reviewed-on: https://chromium-review.googlesource.com/197947
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Since we already created the firmware-nyan-5771.B branch, we can
remove this from ToT now. But for sure we are still able to
cherry-pick changes back to ToT or from ToT.
BUG=none
BRANCH=tot
TEST=make buildall
Change-Id: I637d27b9f8672c5d17b60e210a5211ab8e19b54a
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197165
With change b610695b61, we fixed a problem
with the number of FP regs that were being saved on the stack. That change
decreased the required stack size for non-FP tasks by 64 bytes, but
increased the size needed for FP tasks (such as the lightbar).
The lightbar task was previously using within 64 bytes of its alloted stack,
so handling the task switching correctly meant that it now overflowed.
The hooks task had the same problem, but was hidden by the lightbar task.
This CL bumps the LARGER_TASK_STACK_SIZE up a bit, and switches the lightbar
task to use it instead of the default size.
BUG=chrome-os-partner:27971, chrome-os-partner:28407
BRANCH=ToT
TEST=Try it on both Link and Samus.
Before this change, the Samus lightbar was overflowing its stack every time
the AP booted (causing the lightbar to do things). With this change, it
doesn't. Here are typical stack sizes after this CL:
Task Ready Name Events Time (s) StkUsed
0 R << idle >> 00000000 28.394913 328/512
1 HOOKS 00000000 0.534085 640/768
2 R LIGHTBAR 10000000 5.359356 520/768
3 CHARGER 00000000 0.094674 384/512
4 CHIPSET 00000000 0.003353 320/512
5 KEYPROTO 00000000 0.002814 312/512
6 HOSTCMD 00000000 0.002942 244/512
7 R CONSOLE 00000000 0.193776 340/768
8 POWERBTN 00000000 0.000392 248/512
9 KEYSCAN 00000000 0.409337 332/512
Change-Id: Ica93608c8adb225410a62ec3a0a27944c479270a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197733
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Column 0 is on the slave side. Fix this.
BUG=None
TEST=Press a finger at the center of the panel. See a single shape in
touch data.
BRANCH=None
Change-Id: Ic3a9a4fafc6e7ee39a1c3422905cf3b1758f335a
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197641
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Most of the time we don't need to use a debugger during runtime. Let's
disable SWD ports so that we can use the two pins for touch scan.
We can still re-flash the chips as long as we hold the reset pin when
entering SWD mode.
BUG=None
TEST=Check we can still re-flash the chips
BRANCH=None
Change-Id: Ieb34406f4bc6d6a753ec840b3072f363c7b17c08
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197196
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The current identification method uses SPI_NSS as master/slave
indication. However, if the other chip is not reset at the same time, it
would drive SPI_NSS and fails the identification.
Since the master chip is equipped with USB connection, we can identify
the chips with USB pull up pin, which doesn't suffer from this problem.
Also updates the comments on pin usage.
BUG=None
TEST=Reset the chips repeatedly.
BRANCH=None
Change-Id: Iccd7e73fca85abfa554f90dcb7e354cc4cc04626
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197194
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This implements dual chip matrix scanning. Now the scan result is only
dumped to debug output.
BUG=None
TEST=Put a finger on the panel and see its shape.
BRANCH=None
Change-Id: I015c901b42e24fe4a6249c12c37bc5bfcb308c9f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196468
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Use the plug polarity detected by the ADCs to do the PD communication on
the right CCx line.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28339
TEST=make buildall
on Firefly, plug Zinger connector in both direction and see it can
control it either way.
on Fruitpie, use CC1 or CC2 and see it can communicate on both.
Change-Id: I81cb00f164cb8194fba73b383014e81c37d975e2
Reviewed-on: https://chromium-review.googlesource.com/197520
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Slightly modify interfaces for better sink-only devices implementation
(eg Firefly)
update the host mode management and the voltage selection
and add a hook for board checks.
Simplify the reception timeout and fix other timeout detections.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
and use with the follow-up firefly board configuration CL.
Change-Id: I0240295764c8605793dc80a2fc21357af1740744
Reviewed-on: https://chromium-review.googlesource.com/195585
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Added config option CONFIG_USB_PD_TX_USES_SPI_MASTER which switches
to use SPI master for PD transmit. The advantage of SPI master mode
is at the end of the tranmission, we don't have to send any dummy 0
bits. When the option is set, the CPU_CLOCK must be set to 38.4MHz,
so that the SPI master can generate the correct clock frequency.
BUG=chrome-os-partner:28309
BRANCH=none
TEST=Tested by connecting two fruitpies together across CC1. One
fruitpie has been modified such that the MISO and MOSI lines are
swapped and is running PD TX in SPI master mode with 38.4MHz clock,
while the other is running PD TX in SPI slave mode. On EC console
ran pd charger on one board and pd dev on other board. Verified
that communication works with no errors. Ran for 10 minutes in each
configuration.
Change-Id: Ib24030d34d95d59f4ac6c2dae98bf7adda1ada01
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197215
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In the micro runtime for Zinger, wait for events with interrupt disabled
to avoid race conditions where the event interrupt happens just after we
tested it and before going to sleep.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make BOARD=zinger, test Zinger PD communication from Firefly.
Change-Id: I10b919450a61fac7ea50e84dd73bcc568150e179
Reviewed-on: https://chromium-review.googlesource.com/197051
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
We are running a minimal runtime with less overhead. This allows us to
run UART at 38400 bps. Let's update the config for easier debugging.
Also fix a potential underflow bug.
BUG=None
TEST=See debug output at 38400 bps
BRANCH=None
Change-Id: Ic9e4f9d545f5dbc4a0816a843b0f01a4cf219666
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196190
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This implements a simple SPI driver for the two chips to exchange
packets.
There are both sync interface and async interface. Sync interface is
easier to use, and async interface frees the CPU while the DMA takes
care of the communication.
BUG=None
TEST=Hello test passed
BRANCH=None
Change-Id: I9823bad5cae6d1fa8f3658d17af4b998d3735a3e
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195533
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The two chips work together, so let's teach them how to tell master from
slave. After identification, the two chips shake hands through the two
sync signals.
BUG=None
TEST=Disable handshake on master. See slave fail. Vice versa.
BRANCH=None
Change-Id: Idb6a56128f608dd2ee5c453f75abea475fe1779f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195395
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
So that host and EC commands will be defined in common/battery.c.
The board-specific battery.c can focus on the proprietary method.
BUG=chrome-os-partner:28248
BRANCH=tot,nyan
TEST=make buildall runtest
Tested "cutoff" in EC console on big.
Change-Id: I213c0d601d0241c8dea309d6ac60c72452d2d100
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196621
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Charger v2 assumes the battery_get_info() always returns non-NULL even
if the battery is not detected, for example, in the over-drained
situation. Thus, add a new struct so that we know what the conservative
setting is to pre-charge the unknown battery.
BUG=chrome-os-partner:28112
BRANCH=nyan,big,blaze
TEST=See issue tracker for the test procedure.
Change-Id: Ica4fe75d154e2f195eb1da19ba045346da383b6c
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195596
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
The EC and host have different ways of computing and presenting
the battery charge level. This change adjusts the charge levels
at which the charging LED indicates a full and low battery to
match what is presented to the user in the host UI.
BUG=chrome-os-partner:27743,chrome-os-partner:27746
BRANCH=rambi,tot
TEST=Run "battfake 91" which charging, verify charging LED turns
green and the UI reports 95%.
Run "battfake 13" while discharging, verify charging LED blinks
amber (1 sec on, 1 sec off) and the UI reports 10%.
Change-Id: Iaffffb57a7fbfd14ebb90363cbd4aa1a9becf022
Original-Change-Id: I203c90a65e4aa2907a14077a9276674ecfa292f2
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194347
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195848
This chip got small flash and RAM, so the common runtime is disabled.
Now the code only boots and print something every second to check debug
console and timer are good.
BUG=None
TEST=Boot and see console output
TEST=make buildall
BRANCH=None
Change-Id: I01150e8250a404628d1a3b81e677ac4c29782d7f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195382
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
just picks up this commmand for factory.
BRANCH=ToT
BUG=None
TEST=Run ectool chargecontrol command with each option (normal,
idle, discharge) on blaze. Verifiy battery can discharge.
Change-Id: Id57b42796a26aaf85258048260d06923b78f0773
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/195535
This would move all tegra boards to charger v2.
Also removed the unnecessary charge_keep_power_off(), which was
designed for USB power port and doesn't apply to Tegra platform.
BUG=none
BRANCH=nyan,big,blaze
TEST=build and run on nyan.
Change-Id: I9517a8885726ad6dce5a2865402da4b9551e009f
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194384
Commit-Queue: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add LED behavior for blaze that will the same as falco and kip.
BUG=None
BRANCH=ToT
TEST=manual
Check battery LED show Amber when battery in charging.
Check battery LED show white when battery fully.
Check battery LED show blinking every 500ms when charging error.
Check PWR LED light when system power on.
Check PWR LED off when system power down.
Check PWR LED will blinking every 1sec when system into suspend.
Change-Id: I830952361d3282ff78d29a9a33bd09b64b093ee1
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/193744
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Set battery cut off command and config battery configuration for blaze.
BUG=chrome-os-partner:27120
BRANCH=ToT
TEST=manual
build ec and flash to blaze board,
verify battery works.
Verify battery cut off function is workable.
Change-Id: I2e1f7de9c6370a2a02fb56fc4520f4bc062b4d6b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193000
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
1. Modify voltage_max
2. Set CP point
BUG=chrome-os-partner:27859
BRANCH=Big
TEST=Plug in AC and battery, use UART command "charger" to check
v_batt and I_in and the values are correct.
Change-Id: If83a444338e8d520e6c2f4d04ca6016c14cea8bd
Reviewed-on: https://chromium-review.googlesource.com/193584
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Commit-Queue: Lin Cloud <cloud_lin@compal.com>
Tested-by: Lin Cloud <cloud_lin@compal.com>
This improves some of the smart battery mocks, and adds some more tests for
the new change state machine.
BUG=chrome-os-partner:20881
BRANCH=ToT
TEST=make coverage
Line coverage of this file jumps from 53% to 93%.
Change-Id: I4a9b8818cefaffd3022cebe08a36d592b0611295
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193690
