Before sysjump we need to send a soft reset to any attached devices
and then disable PD communication so that we don't re-negotiate again
before the sysjump. This will guarantee expected message ID is cleared
for after the sysjump.
This also moves executing soft reset from before sending the soft reset
command to after the port partner accepts a soft reset.
BUG=none
BRANCH=samus
TEST=test on samus. without this change, when sysjumping the PD MCU
has time to re-negotiate (at least partially) before the sysjump, which
causes various problems. with this change, when sysjumping, the PD
MCU sends soft reset, and then does not send anything else.
Change-Id: Id7a60c62c8908ee4ab33dfbe995ef136b0aa83de
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233751
Build the hardware version string from the register definitions,
so I no longer forget to update it.
Check it at runtime against the build version registers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=On the console command line,
type "version" and see the following string:
"Chip: g cr50 A1 20141203_224409"
Change-Id: I6d902780d42f2dd18a57ccc08fd4ba4fee5ebc7c
Reviewed-on: https://chromium-review.googlesource.com/233582
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
- record and display reset cause
- add the hard reset option
- add the scratchpad to store values across reboots.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:33818
TEST=On the console command line, chech the "[Reset cause: xxx]" string
- for the initial reset cause
- use "waitms 4000" to trigger a watchdog reset
- use "reboot soft"
- use "reboot hard"
The "utils" test is now building and passing.
Change-Id: I68c7096e5b7bfd102be89fd8eef6fe20da37a6f8
Reviewed-on: https://chromium-review.googlesource.com/233581
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Implement a driver to trigger a watchdog reboot if we are stuck
somewhere. Also display a nice warning when we reach half of the
watchdog period.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=On the console, type "waitms 500" and see nothing,
type "waitms 2000" and see the watchdog warning.
Type "waitms 4000" and see the warning, the platform rebooting.
Change-Id: Iac5d0100febd5eab1ae6cfac5a47ff728ebda3a6
Reviewed-on: https://chromium-review.googlesource.com/233430
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
We were losing timer events because usecs_to_ticks(deadline) was
clipping the value when deadline was larger than 0x08888888 (deadline is
a timestamp rather than a delay).
The computation of the timer deadline has been modified to avoid the
clipping issue.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:34347
TEST=run on Cr50 with the watchdog activated and no longer see watchdog
warnings.
Run the "timer_calib" test and see that the 1s sleep is 1000038 us :
make BOARD=cr50 tests
fhl ../build/cr50/timer_calib/timer_calib.RO.hex
Change-Id: Id2200a89eb1b72099e536291af321609b24b4777
Reviewed-on: https://chromium-review.googlesource.com/233531
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
CL to migrate the flashing VDMs from zinger's custom vdm to
common/usb_pd_flash.c such that other updateable type-C devices can
share.
Additionally adds gaskets to call standard runtime flashing facilities
for USB-PD devices using it.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:31192,chrome-os-partner:31193
TEST=manual,
Try following:
1. From samus_pd console w/ zinger in port 1
pd 1 flash version
pd 1 flash reboot
pd 1 flash info
2. From samus linux prompt w/ zinger in port 1
ectool --name cros_pd flashpd 1 1 <zinger RW payload>
Reading 16384 bytes from
/usr/local/zinger_v1.1.2528-d809e42.ec.RW.bin...
Erasing expected RW hash
Rebooting
Erasing RW flash
Writing RW flash
Rebooting PD into new RW
Complete
3. Repeat 1&2 above on hoho & dingdong.
Change-Id: I018055fa9de128f937c57debdc21dea026137bcf
Reviewed-on: https://chromium-review.googlesource.com/231835
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
dingdong/hoho have no capability to measure VBUS which is advantageous
in determining what timeouts to honor. Previously we simply assumed
vbus was on and that made things happy until,
e0c80ac pd: on hard reset go to a hard reset recovery state
which introduced proper handling around sink & source reset recovery.
With VBUS assumed 'on' this leads to short timeouts chosen
(PD_T_SAFE_0V) which in turn causes sink to resend hard resets before
source has had time (PD_T_SRC_RECOVER) to handle request.
This change creates config CONFIG_USB_PD_NO_VBUS_DETECT for devices
without the capability to account for lack of VBUS detect.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34090
TEST=manual
from samus_pd 'pd 1 flash reboot' is successful
Change-Id: I9ef9b0115c7be6c56c64556d2ce8c296f95c614e
Reviewed-on: https://chromium-review.googlesource.com/233024
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
EAh is used at the end marker for calculating hash in EC.
The extra EAh make hash calculated by EC different from calculated in host
by sha256sum for the RW image. The RO image is fine.
Fix a comment, no A,B images anymore.
BUG=chromium:438326
TEST=Check sha256sum is similar for Ryu EC image.
On EC console
> hash rw
[28.740271 hash start 0x00010000 0x0000ea24]
> [28.938875 hash done e2c40d0168ce4b20e8320438c7fc719d2188d7f88d9cb7ca694527b3f507e534]
sha256sum of built image:
sha256sum build/ryu_p1/ec.RW.flat
e2c40d0168ce4b20e8320438c7fc719d2188d7f88d9cb7ca694527b3f507e534
build/ryu_p1/ec.RW.flat
TEST=Check firmware upgrade still works:
Using a modify version of coreboot with
- ryu_p1 as main ec firmware
- code to reenable SW sync: CL:233222
Ryu with an older image:
cros_ec_init: CrosEC protocol v3 supported (128, 128)
Google ChromeOS EC driver ready, id 'ryu_p1_v1.1.2570-942248a'
Clearing the recovery request.
VbEcSoftwareSync(devidx=0)
EC hash:e2c40d0168ce4b20e8320438c7fc719d2188d7f88d9cb7ca694527b3f507e534
EC-RW hash address, size are 0x835b4ff8, 32.
Hash = b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
Expected hash:b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
EC-RW firmware address, size are 0x837f9374, 59924.
VbEcSoftwareSync() - expected len = 59924
Computed hash of expected
image:b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
VbEcSoftwareSync() updating EC-RW...
VbEcSoftwareSync() jumping to EC-RW
VbEcSoftwareSync() jumped to EC-RW
VbEcSoftwareSync() in RW; done
Check that at next reboot the firmware is not upgraded:
cros_ec_init: CrosEC protocol v3 supported (128, 128)
Google ChromeOS EC driver ready, id 'ryu_p1_no_version'
Clearing the recovery request.
VbEcSoftwareSync(devidx=0)
EC hash:b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
EC-RW hash address, size are 0x835b4ff8, 32.
Hash = b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
Expected hash:b183cd58d668d3d42a7cec95f2dcbb8ddee33f6a42d873f4b78106f85d341b46
VbEcSoftwareSync() in EC-RW and it matches
BRANCH=ToT
Change-Id: I2db275a16b16fbcea95f53287e95104ba921593e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/232952
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Until we implement a proper reset of the microcontroller,
add a reset of the Cortex-M3 CPU core in system_reset() in order to
avoid getting stuck in a weird loop if we get a panic.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=trigger a data abort and verify we are not going into a panic loop.
Change-Id: Ie046379e6a9469bd683fa774cdc9abb10a14e8f1
Reviewed-on: https://chromium-review.googlesource.com/233109
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Our pericom charge detectors can reset themselves on rapid charger plug
/ unplug, which resets the interrupt enable to the power-on default
(off). Work around this problem by re-enabling pericom interrupts from
the VBUS interrupt.
BUG=chrome-os-partner:33823
TEST=Manual on samus. Rapidly plug + unplug charger, verify that Pericom
continues to trigger interrupts.
BRANCH=Samus
Change-Id: I7370525e28c59bdde3765e52523d5158d1d6175d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231700
Reviewed-by: Alec Berg <alecaberg@chromium.org>
A non-zero error code returned by the callback causes EP0 to STALL.
This is the common mechanism used in USB to indicate an error while
processing a control request. This simplifies the implementation
of interface callbacks.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I89ceb4892f9f810fcaf6e975e6982fc5b2ae447b
Reviewed-on: https://chromium-review.googlesource.com/232368
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For accessories without software-sync mechanism, add the option to do a
RSA-based signature verification of the Read-Write firmware.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:31192
TEST=enable the configuration on Fruitpie and see the RW firmware
validated and jump to. Tried with good and bad RW images.
Change-Id: I3c886c2cbe17ca9543e19bf8599061c3f9751d4f
Reviewed-on: https://chromium-review.googlesource.com/229594
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
CL adds sleep to USB-PD flashing loop in ectool. Real problem is
likely busy waiting within the host command master in the EC which
causes it to starve other lower priority tasks there.
Additionally,
1. Sleep 100ms after reboot to attempt to avoid colliding with other
USB-PD traffic communication that happens when accessories boot.
2. Sleep 100ms after last flash write prior to reboot as there's some
race between finalizing flash write.
Workaround should be removed once we've identified root cause.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33905
TEST=manual,
1. attach zinger to port 1 of samus
2. create ec.RW.bin for zinger and copy to samus
3. update RW fw on zinger via:
ectool --name cros_pd flash_pd 1 1 ec.RW.bin
Result:
- No longer see watchdog fire on samus EC
- See successful update of RW fw on zinger. Takes ~15secs.
Change-Id: If617cbf1c25ee92de94bdb312ec822af2a688640
Reviewed-on: https://chromium-review.googlesource.com/230845
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
We still need to decide which direction to use. Refer to the bug
for details & discussion.
BUG=chrome-os-partner:32227
BRANCH=ToT,samus
TEST=make buildall -j
From the EC console, use
lightbar seq tap 0
lightbar seq tap 1
If you don't give the third arg, it just uses the previous direction.
Change-Id: I3a6566e8ba18d392f8d9d3419745a5377d22db25
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231893
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When other tasks call lightbar_sequence() to indicate power state
changes, a single-bit event is delivered to the lightbar task and
the requested sequence is saved in a variable. This is
intentional, because we want the lightbar to run only the most
recently requested sequence.
Of course this means there's a small race condition, which caused
occasional problems. This change reduces the window for problems,
by making a copy of the requested sequence immediately after the
event is delivered (rather than after printing a bunch of stuff),
and then having the current sequence function return that new
sequence back to the lightbar_task() main loop.
While we're at it, the transitional sequences (S5S3, etc.) can
just return their next sequence directly instead of letting that
decision be made in the lightbar_task() loop.
BUG=chrome-os-partner:33401
BRANCH=ToT,samus
TEST=make buildall -j
Power on/off, reboot, open & close the lid, double-tap, etc.
Watch the lightbar the whole time. It should do the right thing.
Change-Id: Icbe96194e523ef4d85d2643ec14675cf5c893dc0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231881
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When another task is holding the lock, mutex_lock() should call
task_wait_event_mask() to wait only for TASK_EVENT_MUTEX events.
If it calls task_wait_event(), any pending events are silently
discarded while its waiting for the the lock.
BUG=chromium:435611
BRANCH=ToT,samus
TEST=make buildall -j, and:
Before this change, I watched the EC console while shutting down
and rebooting Samus. I saw the request event arrive:
[37.576295 LB lightbar_resume() requests 5 S3S0]
[46.055725 LB_version]
But the lightbar task never saw it. Adding a bunch of debug
messages showed that it was being lost in mutex_lock().
After this change, the event is delivered:
[30.167670 LB lightbar_resume() requests 5 S3S0]
[30.171009 LB cur_seq 2 S3 returned pending msg 5 S3S0]
[30.173816 LB running cur_seq 5 S3S0. prev_seq 2 S3]
[32.410073 LB cur_seq 5 S3S0 returned value 0]
[32.410865 LB running cur_seq 3 S0. prev_seq 2 S3]
[39.938388 LB_version]
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I011838538960cc57171f0a3c4cdee113d156e9ff
Reviewed-on: https://chromium-review.googlesource.com/231370
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add active charge port for the PD status exchange so that EC
knows which port we are currently charging from.
BUG=chromo-os-partner:32227
BRANCH=samus
TEST=load onto samus. use "pdcmd 0x100 0 0"
from EC console to read the active charge port and
verify that it matches which port we are charging from.
Change-Id: I419befef8f0a14ca2da237be1a4944fd08733b83
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231349
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Fix bug where if a power swap fails in the final stages, it
will have switched its CC resistor, but will not have actually
switched roles, which causes all sorts of weirdness.
BUG=none
BRANCH=samus
TEST=make buildall. tested power swap between two samus'. modified
one samus to never send PS_RDY when in PD_STATE_SNK_SWAP_COMPLETE,
and verified that when source asks for power swap and fails, that
it properly resets CC to pull-up.
Change-Id: If0fc8d3d51ede3be1160ae3b106061edabeaa948
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231193
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
In sink hard reset recovery, when VBUS finally goes high, go
to SNK_DISCOVERY quickly so that we can set our SINK_WAIT_CAP
timer.
BUG=none
BRANCH=samus
TEST=tested with zinger. when samus sends hard reset, it goes
to SNK_DISCOVERY quickly after VBUS goes high.
Change-Id: Ie5b3ed95ea9e0c405861be71bd694b057de289d0
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231397
Reviewed-by: Vincent Palatin <vpalatin@google.com>
Remove host_event_commands.c from build to save flash space. The
PD MCU does not use host event infrastructure and instead has a
simple gpio line it uses to notify EC that it has info to share.
BUG=none
BRANCH=samus
TEST=make buildall. view the .map file and see we save about 700
bytes of flash.
Change-Id: I71b8a4e32b9ecb57eb1a57f6d28652476ee6afe6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231444
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change zinger/minimuffin product type from AMA to
undefined.
BUG=none
BRANCH=samus
TEST=make buildall. load onto zinger, plug in samus, see:
SVDM/4 [1] ff008041 040018d1 00000000 50120001
[19.163111 DONE]
Verify ID header, 2nd word, bits 27-29 are product type,
where 0 is undefined.
Also verify that product VDO is present, 4th word.
Change-Id: I34a70d9356b5a8ee7ad64a4e8f072d7748aa916e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231172
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Remove dualrole power capable flag from source/sink cap packets
so that samus/ryu default to drawing power from plankton.
BUG=none
BRANCH=samus
TEST=load on plankton. select 20V to DUT, attach samus or ryu
and see that it charges
Change-Id: I3d31b14f65ee8dfa4d817d47598c505b0f6d7479
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231342
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
For P3, we'll use PI3USB9281A, which fixes the I2C clock problem. Let's
remove the workaround and leave the clock enabled all the time.
BRANCH=Ryu
BUG=chrome-os-partner:31526
TEST=Boot on Ryu
Signed-off-by: Vic Yang <victoryang@chromium.org>
Change-Id: I05a3ebbff82282b69e3c5573608e500a34d370c0
Reviewed-on: https://chromium-review.googlesource.com/231180
Reviewed-by: Alec Berg <alecaberg@chromium.org>
I need more information to find the source of some problems. This
just adds a little more context to the lightbar console messages.
BUG=chrome-os-partner:33401
BRANCH=ToT,samus
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I97a210754833c9384eae517f9df2e97d3a9ea6b4
Reviewed-on: https://chromium-review.googlesource.com/231136
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Added new hard reset recovery states for sink and source state machines
and transition there on hard reset. This is necessary because on a hard
reset we are not supposed to turn off vconn, nor disconnect USB, nor
switch the data role. In other words hard reset is not the same as a
disconnect.
This also changes timing around when to send source cap after a hard
reset and when to expect source cap after hard reset.
This also adds a delay between sending hard reset and executing it to
give time for sink to recognize the hard reset as differentiated from
a disconnect when VBUS goes down.
For sink, when a hard reset is issued or received, sink waits for VBUS
to go away, then for VBUS to come back, and then starts the sink wait
cap timer.
BUG=none
BRANCH=samus
TEST=make buildall
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: Icb6ceaf242cebfcf8d08d7317976f83286a256ff
Reviewed-on: https://chromium-review.googlesource.com/228111
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Without a PD contract, regularly monitor CC line voltage to determine
if CC pull-up has changed its current advertisement.
BUG=chrome-os-partner:33682
BRANCH=samus
TEST=test with donette prototype: plug in one donette port to a samus,
see it set current limit to 3A, then plug in another port to a different
samus and see the first samus lower the current limit to 1.5A.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: I965ab5fde7a67025f3f7ea34eb86fa35187080a6
Reviewed-on: https://chromium-review.googlesource.com/230594
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
If our request is rejected, go to SNK_READY, but don't set
explicit contract flag.
This also changes charge manager slightly to avoid new power
request loops. A new power request is only requested if the
charge port changes, or if the active charge port changes its
voltage/current offering. A new power request does not occur
if the current ceiling changes, since the existing contract
still suffices.
BUG=chrome-os-partner:33692, chrome-os-partner:28332
BRANCH=samus
TEST=make buildall. use samus and make sure we negotiate for 20V
as normal. modify zinger to send a REJECT and make sure we go from
PD_STATE_SNK_REQUESTED to PD_STATE_SNK_READY and explicit contract
bit is 0.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: Iec02663364dcdc4aa66c681ec08911db7424abbc
Reviewed-on: https://chromium-review.googlesource.com/230522
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add tSenderResponse timeout to waiting for response from a request
message. If timeout triggers, send hard reset.
BUG=chrome-os-partner:33687
BRANCH=samus
TEST=test with zinger that we can negotiate normally. then modify
zinger code to not send any response when it receives a request and
see that samus sends hard reset from PD_STATE_SNK_REQUESTED.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: If147d809cfe185ec714e292a4814fbbfb50af04b
Reviewed-on: https://chromium-review.googlesource.com/230521
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add flag for whether or not a type-C port is in an explicit
contract. This flag will be used in the future to determine if
VDMs can be sent.
BUG=chrome-os-partner:33861
BRANCH=samus
TEST=load onto samus. plug in to zinger, use pd 1 state to verify
explicit contract bit is set. plug in to another samus, issue a power
swap, see contract bit go away and come back when contract is
established.
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: I9404e7cc920ebe0b37d9efae758436cc6aa7be85
Reviewed-on: https://chromium-review.googlesource.com/230520
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When using gpio_set_flags_by_mask() to modify a GPIO pin setting, the
former code was not able to revert an open-drain GPIO into push-pull
mode (the other way round was working). Fix it to be able to transition
in each direction.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=all
BUG=none
TEST=on Twinkie, run "tw res none RP3A0" then "adc" and see the RP3A0
GPIO set to 1 and pulling the CC to 3.3V.
Change-Id: Ic2d8ed95ea21b21d261a12ba298931d8bd5e6919
Reviewed-on: https://chromium-review.googlesource.com/231150
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Ensure that the PD source changes the output voltage after
tSnkTransition delay after having sent the ACCEPT message
(rather than before).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33684
TEST=connect Zinger to a PD power sink and monitor VBUS and CC while
doing a 20V to 5V transition.
Change-Id: If86f59eec67630491f4e8dc13a52015ac2de918a
Reviewed-on: https://chromium-review.googlesource.com/230805
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
The latest gcc picked up a couple out-of-bounds issues, so
"make buildall" was failing. This fixes them.
BUG=none
BRANCH=ToT
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Idcd6a3358ecbb0e0d2a610e1cd28c2f138ce520b
Reviewed-on: https://chromium-review.googlesource.com/231156
Reviewed-by: Randall Spangler <rspangler@chromium.org>
For USB console, we wait for USB host to grab the data before writing
the next chunk of characters. However, if the USB peripheral is
disabled, the current implementation is confused as to whether the host
has grabbed the previous chunk of data.
Fix this by explicitly checking for USB peripheral enabled.
BRANCH=ryu
BUG=None
TEST=Boot on Ryu and check console isn't slow.
Signed-off-by: Vic Yang <victoryang@chromium.org>
Change-Id: I438c95835e56707b7ca1796734f2e47062799f44
Reviewed-on: https://chromium-review.googlesource.com/231115
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
