Don't build a table of host / console commands if the HOSTCMD or CONSOLE
task is not present. This saves space in the .hcmds / .cmds section and
allows the linker to prune command handler functions which will never be
called.
BUG=chrome-os-partner:41959
TEST=Verify ec.RO.flat shrinks on snoball and glados_pd, and remains the
same size on chell and samus. Also verify basic functions are still
working on snoball and glados_pd.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I79975c18ec1d87fedda8d1f299f30ffc43c24f69
Reviewed-on: https://chromium-review.googlesource.com/319112
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On some systems, we may wish to have the PD follow the EC into
hibernate. Add a status field to EC_CMD_PD_EXCHANGE_STATUS to support
this.
BUG=chrome-os-partner:45010
TEST=Manual on glados with subsequent commit. Run 'hibernate' on EC
console, verify that both EC and PD go to hibernate. Plug zinger and
verify that both EC and PD wake, AP boots, and battery begins charging.
BRANCH=None
Change-Id: I0476bc8a47ffb0fe113dccda9d4f8074105c1c84
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302712
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
For multi-byte ACPI memmap reads, we previously had a mutex to ensure
data continuity. A better approach is to use a read cache. Since the
kernel will enable burst mode before reading a multi-byte memmap
variable and disable it afterward, we can populate the cache on the
first read after enabling burst. This solution removes deadlock bugs, is
contained entirely in acpi.c, and saves a deferred function.
BUG=chromium:514283
TEST=Manual on Glados. Add prints in acpi_read, verify that multi-byte
reads come from cache and non-burst reads continue to function as
before.
BRANCH=Cyan
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I74e4927bf2b433e31a9ff65d72820fa087c51722
Reviewed-on: https://chromium-review.googlesource.com/288871
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
mutex_lock() is called from MEC1322_IRQ_ACPIEC0_IBF
interrupt context, causing deadlock and assertion
in __wait_evt().
In the interrupt context it now checks for mutex lock first.
If the mutex is already locked,, it will disable ACPI
interrupts and defer the memmap mutex lock.
Added LPC interrupt disable/enable functions as needed.
Increased deferred function count where needed.
BRANCH=None
BUG=chrome-os-partner:40820
TEST=Test for suspend-resume, cold, warm reboots and
other general stability.
Change-Id: I3dda0d4635a6b6281faf200c8c7b6fcba8877254
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/280418
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Add CONFIG_LTO to use GCC Link-Time Optimizations to try to reduce the
flash footprint of the firmware.
Add additional protection to some functions/data to avoid removal by the
linker when their usage is not obvious.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall (with and without LTO enable on all boards)
Change-Id: I586b8c1eda4592b416c85383b65153c1d5ab0059
Reviewed-on: https://chromium-review.googlesource.com/271291
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Some platforms are unable to access the 900h-9ffh region over LPC and
must instead access memmap data through the ACPI CMD / DATA ports. To
avoid racing with data updates, disallow changes to multi-byte memmap
data while in burst mode.
Linux currently enables burst mode when accessing multi-byte data and
disables it immediately afterward, though the ACPI spec defines burst mode
in a more general way.
BUG=chrome-os-partner:38224
TEST=Manual on Samus. Undefine LPC_MEMMAP and modify asl to move memmap
data to ERAM at offset 0x20. Verify system boots cleanly and battery
status is updated immediately on plug / unplug.
BRANCH=None
Change-Id: Ib848bdb491fdfece96ad0cee7a44ba85b4a1a50b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/262072
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Fix bug on samus that the battery status doesn't always show on
lightbar when AC is plugged/unplugged. It doesn't show when the
battery is full is S3 or S5 because in these states we turn off
CHARGE_EN so that ACOK to the EC never toggles.
Instead, what we want to do is display battery status whenever the
active charge port changes. This will happen when AC is plugged or
unplugged OR if a user has AC on both ports and toggles between
them using the charge override hot-keys.
BUG=chrome-os-partner:36317
BRANCH=samus
TEST=test plugging and unplugging AC on both sides when battery is
full and unit is in S0, and when unit is in S5. also tested lightbar
flashes battery percentage when two zingers are plugged in and you
switch between them using Ctrl+Search+0|1|2.
Change-Id: I5cd7fff4f466adf857f1e63f07f3b0c7ae8422c7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/245922
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Occasionally the charge circuit on samus gets wedged and will not
charge. This change detects when the charge circuit has failed
and automatically recovers from it. It uses the BQ PROCHOT warning
to detect the failure by setting PROCHOT to trigger when the BQ
thinks input current is higher than the input current limit. When
the failure is detected, the EC disables charging and tells PD MCU
to disable CHARGE_EN, then a couple seconds later, it re-enables
charging.
This CL also adds more communication between EC and PD for the EC
to be able to set the charge state for the PD. Valid charge states
are: No charging allowed, 5V charging only, and max charging. The
EC uses this as such:
- When the EC gets AC present interrupt, it sets off a deferred
function to change charge state to max charging after some delay
to give time for the charge circuit to settle down.
- When the EC gets AC disconnect interrupt, it disables charging
briefly, enables learn mode, and then sets 5V charging allowed.
This allows for the same starting conditions in the charge circuit
for every AC attach.
- When the EC detects a wedged charge circuit, it disables charging
and waits a few seconds before re-enabling 5V only charging.
Additionally, this change moves the charging cutoff in S3/S5/G3 when
the battery is full to the EC. With the added control for the EC
to set the PD charging state, it is more convenient for the EC to
manage cutting off charging when battery is full.
BUG=chrome-os-partner:36081
BRANCH=samus
TEST=test the basics:
- connect/disconnect zinger a bunch of times
- connect and disconnect two zingers in different order
- connect two zingers and charge override between the two
test the automatic charge wedge recover:
- wedge the charge circuit by setting charger voltage under battery
voltage: "charger voltage 7000"
- wait a few seconds for the system to recover and check it is charging
with "battery" command
test full battery charge cutoff:
- added console command to change battery soc in board/samus/extpower.c:
static int cmd_battfake(int argc, char **argv)
{
char *e;
battery_soc = strtoi(argv[1], &e, 10);
batt_soc_change();
return EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(battfake, cmd_battfake, "", "", NULL);
- in S0, tested "battfake 100" does not disable charging.
- in G3, tested "battfake 100" disables charging and "battfake 99"
re-enables charging.
- set "battfake 100" and tested transitioning to S0 enables charging and
transitioning to S5 disables charging.
- attached two chargers and used charge override to select active port.
then toggled "battfake 100" to "battfake 99" back and forth and verified
charge override port is still the same.
test third-party 12V charger:
- plug in a bunch of times and make sure we stay at 5V for 500ms and then
transition to 12V
test with no battery:
- tested five different units with no battery and just zinger. 3/5 boot,
while the other 2 don't. But, the 2 that don't boot without battery also
can't boot w/o battery when this CL is reverted, so I don't think this
change is causing the problem, I think there is an electrical limitation.
test with EVT zinger:
- EVT zingers (P2 - C2) negotiate very quickly after connection, which
can cause INA problems w/o this CL. Tested an EVT zinger with samus and
did a bunch of connections and disconnections and verified that we always
wait at 5V for 500ms and that we don't wedge the INA circuit on connect.
test backwards compatibility:
- test new PD with old EC and make sure we can charge with zinger.
(note that if the charge circuit wedges, we won't be able to unwedge it).
- test old PD with new EC and make sure we can charge with zinger.
Change-Id: I7703b7a2ab1209d7f559b265b03517e79c74b16a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/245253
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This exposes the pd_exchange_status() function and lets it
return the charge port that the PD reports, so that the lightbar
TAP sequence can decide which direction to display.
BUG=chrome-os-partner:32227
BRANCH=ToT, samus
TEST=make buildall -j
Change-Id: I78b57fbeaaf38fee15c86eca4d90abce77e2f722
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/232092
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Use a EC to PD host command to notify the PD MCU when a battery
is present and charged enough that it is ok to negotiate for a
higher power. The PD MCU will not negotiate until the host command
is received, which allows the system to be powered without a
battery or with a dead battery with 5V.
BUG=chrome-os-partner:28611
BRANCH=none
TEST=Tested on a samus:
1) Tested the normal case of battery charged and plugged in. When
charger is plugged in, the device immediately starts negotiating
for 20V and starts charging.
2) Tested with no battery. Plug in a charger, samus boots and stays
alive. VBUS measured at 5V. When a battery is plugged in, device
negotiates for 20V and starts charging.
3) Tested dead battery by taking a battery with no charge, and
plugging in zinger. Everything boots, but PD does not negotiate
for power. Then when battery reaches 1%, PD negotiates and zinger
switches to 20V without causing a reboot.
Change-Id: Iaa451403674e86cddbd3fe80e9503584910be576
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201958
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Every board other than link does the same thing - filter out the power
button event, then set the WAKE_L gpio level based on the remaining
events. This code doesn't need to be duplicated 7 times, so make it common.
Link didn't filter out the power button wake signal, but works fine
with the common implementation. Like the other boards it gets a power
button wake event via the dedicated PCH PWRBTN# signal.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=suspend link, then wake using power button press
compile all platforms; pass unit tests
Change-Id: Ib3a6d310d0f5e337374b3c331ab2872fe377bdf6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171405
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Remove support for allowing host command handlers to set the response
pointer. This is just one more thing that can break (and did, on SPI
protocol V2). No commands other than the trivial read-memory-map
command in host_command.c and flash read made use of this capability,
and the savings in performance was negligible.
BUG=chrome-os-partner:21576
BRANCH=none
TEST=boot pit; still boots
Change-Id: I0a9bcf57dbea7155318fc389d7b47d3742a1a00a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64236
This wraps the EC_HOST_EVENT_THROTTLE_START/STOP host events in a new
function called host_throttle_cpu(), similar to chipset_throttle_cpu().
That function requests the AP to throttle itself, which is less drastic than
just smacking it down from the EC.
BUG=chrome-os-partner:20805
BRANCH=falco,peppy
TEST=manual
This is a refactoring change only. All boards should still build, all tests
should still pass.
Change-Id: I871cce8f0e13230cb52eeb5e16955266f8461374
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63909
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This will fix EC flash commands on pit, once the host side (u-boot and
cros_ec driver) are upgraded to match.
This change is backwards-compatible the EC still supports the existing
version 2 protocols for talking to existing AP/kernel/ectool.
Once the AP-side supports version 3 for SPI (and existing systems are
upgraded), we will remove older SPI support since we haven't shipped a
product which uses SPI.
BUG=chrome-os-partner:20257
BRANCH=none
TEST=disable cros_ec driver support in ectool; 'ectool hello' works on link
And with an old ectool which predates this CL, 'ectool hello' also works.
On pit, from u-boot prompt, 'crosec test' and 'crosec version' work, and
keyboard works.
Change-Id: I01f193e316e9aa442fe50d632dc8a4681723e282
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58908
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
It's not used by the host command module or handlers, so shouldn't be exposed to them.
BUG=chrome-os-partner:20185
BRANCH=none
TEST='ectool hello' still works
Change-Id: I0122bd9ef33e71afab7e5cc035fb3b9d220334c6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58632
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The flags are specific to the LPC interface and not used by the host
command module, so shouldn't be present at that level.
BUG=chrome-os-partner:20185
BRANCH=none
TEST='ectool hello' still works
Change-Id: I6b2c3208fc398ea40d9e7cc7bf5ec206b3e317d8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58631
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The WAKE# pin was being driven low when the power button was
pressed and no other events were occuring. This causes a PCIE
wake event to be observed on the host. This is incorrect. Therefore
only assert the WAKE# pin when any other event but the power button
has occured.
The implementation introduces a board-specific callback,
board_process_wake_events(), which handles the specific logic
for the wake events.
BUG=chrome-os-partner:19810
BRANCH=None
TEST=Manual. Both power button wakeup and lid events were tested. The
presence of PCIE Wake no longer exists for S5->S0 transitions.
Change-Id: If1311ccc36629b04d2d9e021c3e103e379836a3a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56970
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
On 64-bit platform, arrays should be aligned to 8 bytes. Also, change
the order of host_command fields so that it's packed on both 32-bit and
64-bit platforms.
BUG=chrome-os-partner:19257
TEST=Pass all tests. Print out and check the content of host commands.
BRANCH=None
Change-Id: I350a903bc11562d6d205c402548942f8967b75a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50467
This prevents the host from rewriting them during the checksum operation.
BUG=chrome-os-partner:13202
TEST='ectool version' should still work
BRANCH=link
Change-Id: Ib44f45b027c0a54ba40f70052728ba427dc71849
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/31511
Reviewed-by: Simon Glass <sjg@chromium.org>
Rather than have the send_response() handler called willy nilly from
around the EC code, provide an official function for doing this step.
BUG=chrome-os-partner:12685
BRANCH=snow,link
TEST=manual
build and boot to kernel on snow
Tried 'mkbp reset' command on snow but it did not seem to work properly
Unable to test on link at present
Change-Id: I8d9146639efb2af482d80563b403771cee961942
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/30468
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This removes a bunch of unnecessary typecasts, since you can assign
to/from void * without them. This also uncovered a few cases where
const was being cast away for the input params; now fixed.
BUG=none
TEST=mkbp hash from u-boot console, and/or system boots ok
Change-Id: Ic314b9d2ca06226ea8a09703ef5c1a912eb7146d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28500
It's a bit odd that the drivers package up a command to be processed
by host_command, but then host_command calls a global function to
pass the response back.
This adds ambiguity in the host_send_response() implementations as to
whether the command being responded to really is using the same
buffers that the driver set up.
Add a function pointer to the command, and have host_command call
that. Add status to the args structure also, which removes some of
the special case logic for error handling.
BUG=chrome-os-partner:11317
TEST=manual and a bit ad-hoc:
(note, this testing is not completed yet)
Check that snow and link still process commands correctly over I2C
from U-Boot. At this stage only the old interface is supported.
SMDK5250 # mkbp test
Old interface:
New interface:
Version 0: ec_command() returned error
Test failed with error -1
SMDK5250 #
Change-Id: I816738150bce3f8d78e7cd32abf361621aa12312
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28154
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Currently, I2C commands look like this:
Input:
cmd8 [params bytes] checksum
Output:
response8 [response_ptr bytes] checksum
Use a prefix byte of (0xDC + cmd_version) to indicate the command
version. This is compatible with the existing protocol, since there
are no host commands in the range 0xDC-0xFB. If the first byte of
the from-host data is 0x00-0xDB, it's a version 0 command.
There is no change to the output format, since the EC needs to hand
back a response which matches the version requested by the host.
New input:
(0xDC+ver8) cmd8 paramlen8 [params bytes] checksum
New output:
response8 responselen8 [response_ptr bytes] checksum
If the host gets a response of EC_RES_INVALID_COMMAND, it knows it's
talking to an old EC, and at most version 0 of the command is supported.
BUG=chrome-os-partner:11317
TEST=manual and a bit ad-hoc:
(note, this testing is not completed yet, so far only snow is tested)
Check that snow and link still process commands correctly over I2C
from U-Boot.
SMDK5250 # mkbp test
Old interface:
New interface:
Test passed
Change-Id: I1c21f2b036091e9122b4f980ca5f5af34f7fc070
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27470
It's a bit odd that the drivers package up a command to be processed
by host_command, but then host_command calls a global function to
pass the response back.
This adds ambiguity in the host_send_response() implementations as to
whether the command being responded to really is using the same
buffers that the driver set up.
Add a function pointer to the command, and have host_command call
that. Add status to the args structure also, which removes some of
the special case logic for error handling.
BUG=chrome-os-partner:11317
TEST=manual and a bit ad-hoc:
(note, this testing is not completed yet)
Check that snow and link still process commands correctly over I2C
from U-Boot. At this stage only the old interface is supported.
SMDK5250 # mkbp test
Old interface:
New interface:
Version 0: ec_command() returned error
Test failed with error -1
SMDK5250 #
Change-Id: Ic4afdcd7689666cc0f6af228abc6cffe41b0fcbf
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27468
U-boot and ectool need this to see what events have occurred, in a way
which doesn't conflict with ACPI/SCI/SMI.
BUG=chrome-os-partner:11172
TEST=manual
- boot EC
- look at event set / event clear debug output; that's for copy A
- from ec console,
hostevent -> events=0, events-B = 0x2088
hostevent clearb 0x2000 -> events-B = 0x88
Change-Id: If842b157914426df593d82af2bfb08a923caa34b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27317
Saves 2 params being passed around needlessly.
BUG=chrome-os-partner:11275
TEST=mkbp hash from u-boot console should still work
Change-Id: I958e4a09f16413e4d051e278dc0384aa9b791aa4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27312
This is necessary for an imminent change which passes version data
from the host bus (LPC/I2C/SPI) into the host command handler.
BUG=chrome-os-partner:11275
TEST=from u-boot prompt, 'mkbp hash'
Change-Id: If34d0d7c6dc320ad5632becf512c30900fd61aca
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27190
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Added version mask field to DECLARE_HOST_COMMAND() because it's
convenient to do so when I'm touching all host command
implementations, but all commands simply declare version 0 and nothing
checks it yet. Will add version support in a followup CL.
This change is internal to the EC; it does not change the data sent
over the host interface.
BUG=chrome-os-partner:11275
TEST=manual
ectool version && ectool echash; should get sane data from both
ectool flashread 0x80 0x40 /tmp/foo && od -tx1 /tmp/foo
should match data from offset 0x80 of ec.bin (od -j128 -n64 -tx1 ec.bin)
Change-Id: I5699f72b8d5e1ac23929353c9a34158d76c44206
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27172
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Now that ACPI events are handled directly in the LPC interrupt
handler, we can simplify the host event code.
BUG=chrome-os-partner:11240
TEST=boot system; should boot
close lid; should send SMI and suspend system
Change-Id: I8c73ea31a66e94310e4460a008635a103220413e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27100
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
BUG=chrome-os-partner:11090
TEST=suspend laptop, then press power button; should resume from suspend
Change-Id: I36b7c62b2e115bb97d37defcd3c783af0f91d5f8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26730
And fix returning memory-mapped string length on LPC as well.
BUG=chrome-os-partner:11090
TEST=manual
from EC, 'hostevent set 0x40000'
from host, 'ectool eventget' --> should print 0x40000
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I9edbd0a1468b5d4160ce67c471332226e51fa868
Reviewed-on: https://gerrit.chromium.org/gerrit/26719
Reviewed-by: Simon Glass <sjg@chromium.org>
Rather than go through the task queue, host_command_process() processes
the command immediately, has all of its required state passed in,
allowing the caller complete control of the buffers.
BUG=chrome-os-partner:10533
TEST=manual:
build and boot on link, see that messages are stil processed
build and boot on snow, which uses this new command
See that the SPI keyboard works now
Change-Id: Ib7587de10c42caf01bc95bb4d515fd0afc3da7d8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25983
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This seems to be a hangover from the LPC protocol. We can send a result
just by sending a response with no data.
Drop this function and remove all uses of it.
Also use 'enum ec_status' instead of int, since this is the correct
response type.
BUG=chrome-os-partner:10533
TEST=manual:
build for all boards
build and boot on daisy
Change-Id: I93a029bd6ba8cec567b61af3b410bcead015b5c0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25980
Preparatory work to use common host command code between ARM and x86.
Just rename constants, do not change the binary API.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9614
TEST=make BOARD=link
Change-Id: I534d427c9b50103273835a6f32a0ddb622c762b3
Preparatory work to use common host command code between ARM and x86.
Every command sends back explicitly the size of the response payload.
The size of the response defaults to 0 ond can be updated.
Add a protocol version number returned as command 0x00 to help with
backward compatibility.
move a couple of function from lpc specific header to host commands to
be able to implement them for the I2C link.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9614
TEST=make BOARD=link
Change-Id: I6a28edf02996ddf6b7f32a3831d07d5f0271848f
