The Azalia table is a lookup. It is hard to imagine that it should
not be CONST. The compiler does not complain when the Azalia
related fields in the structs passed into the AGESA OEM callout
are set CONST. If the compiler does not complain, then the
calling function does not modify the Azalia lookup table.
Therefore, there is no issue with setting the Azalia verb table
pointer fields as CONST. All this does is provide more detail to the
compiler so that it can flag errors at compile-time rather than
runtime.
Change-Id: I269c137f8644e97e095e1e39df1a255223cf07b0
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
KavariPi: Change the default Sata6AhciCap to TRUE
Change an internal AGESA variable to allow SATA AHCI
mode to grab all six ports
KaveriPI: Eliminate BOUNDS_CHK errors for HEAP locate objects function
Internal to AGESA, HEAP locate functions return an
error code. The error code shows up in the output from
AmdReadEventLog(). Sometimes the locate functions are
only used to determine if processing has already occurred.
Change AGESA so that no error is generated in the log
for simple locates. Memory allocates and deallocates
still generate an error.
Kaveri: GfxInitSview() needs to preserve GFX PCI config space
When GfxInitSview() starts processing, it sets the I/O,
memory, and busmaster bits in the integrated graphics device
config space header. When GfxInitSview() completes the
I/O bit is cleared. Change AGESA so that GfxInitSview()
preserves the config space I/O, memory, and busmaster
bits through the function.
Change-Id: Ic30afefa9e0da14017642e1242976771908847bc
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Add the header files, Makefiles, and Kconfig files to support the
AMD Embedded "Bald Eagle" binary AGESA. The header files need to
exactly match the files used to build binary AGESA.
Change-Id: I7a245bc4d36faa65838f3f41d2367889531d9aa7
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Move the Bald Eagle AGESA.bin file into a socket-specific directory
to highlight that this BLOB is only for soldered down processors in
an FP3 package.
Change-Id: Iabef48c2f64a5d1fd7c1a9b1de65460308165f0c
Signed-off-by: Bruce Griffith <bruce.griffith@se-eng.com>
**************************************************************************
* ATTENTION: The blobs/cpu/qualcomm/ipq8064/sbls.bin file is a
* placeholder.
* It is NOT a working IPQ8064 binary.
*
* Developers should maintain the IPQ8064 file on the flash device and be
* sure to back it up prior to overwriting it with a coreboot image.
**************************************************************************
Change-Id: Ifadede6d7851a7dfb2eada8f58752a5971f9a9aa
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Steppe Eagle (00730F01) contains the Avalon southbridge and
a Platform Security Processor (PSP). Supporting the PSP requires
specific binaries to be included in the rom. These binaries are
being added to the AMD directory as separate pieces but will be
swapped out for a combined binary in the future. The fletcher
utility is used to sign PSP binaries.
Change-Id: If6325d5f9ecec141317436a602c4cc1349a3f13f
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Add the header files, Makefiles, and Kconfig files to support the
AMD Embedded "Steppe Eagle" binary AGESA. The header files need to
exactly the files used to build binary AGESA.
Change-Id: Ia81caaaa3d90a3c23280a06fcfb50b922c94288a
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Move the Steppe Eagle AGESA.bin file into a socket-specific directory
to highlight that this BLOB is only for soldered down processors in
an FT3b package.
Change-Id: I291b6a60be7d8f9d784e75650bc721495d89a4c7
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Move the AGESA BLOB from the CPU directory to the PI directory to match
the organization of the Steppe Eagle directory. Convert the license
file from RTF to text so that it can be reviewed in Gerrit.
Change-Id: I2b7e499ea458939af3ed5bf4e4e8d59301733ffc
Signed-off-by: Bruce Griffith <bruce.griffith@se-eng.com>
Add AGESA BLOB, VBIOS, and xHCI BLOB into the 3rdparty repo. These
are explicitly to support AMD Embedded "Steppe Eagle" processors in
an FT3b package. These BLOBs may also work with other AMD Mullins
based processors but use with other variants is not supported.
Change-Id: I6911e03fc605d38cf8283d34113ae8943ffa2500
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
- Update the imc.bin file to v1.0.11
- Add the imc.bin release notes
- These files are released under the license file
added in the xhci binary file update - commit 5cb8acef.
These files were obtained from:
RichlandPI_1.1.0.5 - April 2014
Change-Id: I5dbb97d9cd767bde98028645a4b14b5cc68526ea
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
- Add the updated xhci binary - Version 1.0.0.48
- Add the release notes for the xhci binary
- Add AMD's license file.
These files were obtained from:
RichlandPI_1.1.0.5 - April 2014
Change-Id: Id4ab7bb09b203b8afe7250b78c36012b6735f4b2
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Add AGESA BLOB, VBIOS, and xHCI BLOB into the 3rdparty repo. These
are explicitly to support AMD Embedded "Bald Eagle" processors in
an FP3 package. These BLOBs may also work with other AMD Kaveri
based processor but use with other Kaveris is not supported and has
not been tested. Use at your own risk.
Change-Id: Ia3807835fdde3b2ee76ab25cfa7943085866d794
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Add the update-microcodes.sh script in anticipation of removing the
microcode updates from the main coreboot repository.
The script is copied verbatim from main repository.
Change-Id: I4d07d48646d71d58b5be329a24352ec04ae2f02d
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The code tests a register 5000 times that I doubt exists
on sandy bridge. reduce to 50.
Change-Id: I86d0e35e3a8cd61b3f7c531cd4e3dd8cc5b28f57
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
This is a fake binary. Run strings on it to determine the
URL of the real binary.
Change-Id: Iaebdb2336e1df3b10395031b8f19d46b7550acc6
Signed-off-by: Stefan Reinauer <reinauer@google.com>
The pei_data version changed to 6, so new binaries are needed.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: Ia4f85c12d11d89a17c38530b1d92861d1cdad679
Look into the file to find out where to get the actual bootblock
for now. This is hopefully temporary to get the coreboot build process
in place and working.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: I53987a0515b00af83f959468296b4c5929ba49df
The pei_data version changed, so new binaries are needed
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: Ic7f503f5ad547c9268b50b356b2835a7677319e1
