PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.
BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Remove the last pieces of external Sensor Hub support:
- Sensor hub UART exported over case closed debugging
- Sensor hub related GPIOs
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=plug Suzy-Q to Smaug and test debug UARTs and SPI flashing
Change-Id: I47b42f63647735bae37b9256e2704303c48b5854
Reviewed-on: https://chromium-review.googlesource.com/290115
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
boards version 6 / 7 / 8 have an I2C bus to sensors.
board version 0+ has a SPI bus to sensors
On board v0, enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board,
on v7 and v0 boards, check closed case debugging and type-C features
Change-Id: Ic8de2bb0f9d8a15f86a2c1ea98ef27613f090b22
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289960
Enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board.
Change-Id: If17eff36e2a3ea0fe59d6677aa41ba5f802e33b6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288516
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.
To have SPI master ports, spi_ports array must be defined.
BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304
Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
use (LID_OPEN == 0 && BASE_PRES_L == 0) as the lid closed condition to
avoid false triggers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, play with magnets and the genuine lid,
check we get the right "lid open" / "lid close" messages on the console.
Change-Id: Ie0a34fb7e45e8a424ff1cfda7662543d4f336f1a
Reviewed-on: https://chromium-review.googlesource.com/287853
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Remove duplicate board_discharge_on_ac() functions and create
CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM for boards that have a
unique implementation of board_discharge_on_ac().
BUG=chrome-os-partner:42294
BRANCH=none
TEST=make -j buildall.
load on samus and test 'ectool chargecontrol discharge' forces
discharging on AC, and 'ectool chargecontrol normal' resumes normal
charging.
Change-Id: I2b7c04b9278d07748d6d41798ceab1a7e90684e4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284911
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Enable code to use BMI150 FIFO and interrupt support on Smaug
BUG=chrome-os-partner:39900
BRANCH=smaug
TEST=Check fifo is working, interrupts are enabled.
Change-Id: Ifc07da793d3ece4806895db4aff5d880c0f3d9b0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274228
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Take profit of the hardware input current ramping/back-off integrated
in the BQ2589x charger by setting the current limits higher for BC1.2
USB modes and letting the hardware adjust to the actual charger
limitation depending on the VBUS voltage droop.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42045
TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current
adjusted to 1650mA without brown-out, read back the value properly from
the AP:
$ ectool usbpdpower
Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW
Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093
Reviewed-on: https://chromium-review.googlesource.com/282584
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Set the resistance compensation for the charger IC according to the EE
team measurements :
- Resistance compensation = 60 mOhm
- Voltage clamping = 160 mV
- Thermal regulation = 120C
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38603
TEST=dump the BQ25892 registers by using the "bq25" command and see that
REG08 contains 0x77.
Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648
Reviewed-on: https://chromium-review.googlesource.com/281660
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously we supported using a single pi3usb9281 chip, or using two
chips on the same i2c bus behind a mux. Now that we need to support a
third configuration of multiple chips on different busses, it makes
sense to be able to configure the configuration freely at the board
level.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I120dcb1c3ceb6f013b92407effcd8cb66e7ffcce
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276511
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Move the task responsible for detection of USB chargers to common code
to reduce code duplication.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I362f8b5b51741509e459c66928131f1f6d2a3b1d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Move parts of usb_pd_config.h that are not part of the phy layer
out of usb_pd_config.h and into board.h. This cleans up the
division between the TCPC and TCPM as only the TCPC needs to
use usb_pd_config.h.
Also cleans up the use of the CC detection voltage thresholds
by creating standard macros to use based on Rp strength for the
board.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270337
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add config options for various parts of USB PD stack:
CONFIG_USB_POWER_DELIVERY: The use of this option has changed
slightly. It now represents whether or not to include the USB
PD protocol and policy layers of the software stack.
CONFIG_USB_PD_TCPC: Compile in type-C port controller module
which performs the phy layer of the PD stack.
CONFIG_USB_PD_TCPM_STUB and CONFIG_USB_PD_TCPM_TCPCI: If
CONFIG_USB_POWER_DELIVERY is defined, then one TCPM needs to
be defined to declare which port management module to use
to drive the TCPC.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I41aa65a478e36925745cd37a6707f242c0dfbf91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270171
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add Primitive support for Bosh Sensor.
Neither gesture nor FIFO are supported.
BUG=chrome-os-partner:39900
BRANCH=none
TEST=Running accelinfo.
From user space, check values via /sys/class/iio/devices/...
Change-Id: I62dbe230c9064ec7c0fa8e343bbe6eae843e3ac0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270455
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
- allow power swap only when we are dual-role toggling (ie in S0).
- enable the VCONN swap feature to support more type-C dongles.
and allow it using the same rule as power swap.
- become a power sink when we are connected to an externally powered
DRP.
- by default, try to be a data UFP for USB.
so Dual Role Device such as laptops can get our data.
- add a message to inform the AP that our USB role has changed
(but the host events are fully wired yet on Ryu)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: Id0f9027b140cb20f105bcdbc00cac5cb5f44c9e0
Reviewed-on: https://chromium-review.googlesource.com/269857
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Enable the support to be a USB-PD alternate mode DFP and add
configuration for the DisplayPort alternate mode and the GFU mode.
Only on Ryu P6 as the P5 board is using the HPD line for the power
sequencing workaround.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:39946 chrome-os-partner:38689
TEST=on Ryu P6, plug a Hoho dongle, see that the superspeed muxes are in
DP1 or DP2 mode (using the "typec 0" command), plug and unplug an HDMI
monitor and see the HPD line moving when typing "gpioget USBC_DP_HPD".
> pd 0 state
Port C0, Ena - Role: SRC-DFP-VC Polarity: CC1 Flags: 0x1150, State:
SRC_READY
> adc
VBUS = 4980
CC1_PD = 992
CC2_PD = 57
> typec 0
Port C0: CC1 993 mV CC2 58 mV (polarity:CC1)
Superspeed DP1
> gpioget USBC_DP_HPD
0 USBC_DP_HPD
<--- PLUG monitor --->
> gpioget USBC_DP_HPD
1* USBC_DP_HPD
Change-Id: Ie25a3bb0d6331c1d931b7f542fbc637270c20b3b
Reviewed-on: https://chromium-review.googlesource.com/269855
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
The charger chip is supposed to handle this feature in hardware.
Let's disable the software version to exercise the hardware.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38603
TEST=on Ryu P6, plug BC1.2 chargers through legacy A-to-C cable.
Change-Id: I074eee0621ba8d23c7ef87dd251ce8fbf86a0265
Reviewed-on: https://chromium-review.googlesource.com/269518
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
- use the TI BQ25892 instead of the BQ24773 as the battery charger,
update the board configuration accordingly.
=> this change is NOT backward compatible with previous boards
- upate GPIOs configuration
- Use the BQ25892 5V boost to source VBUS.
- on the type-C port, Rp has been set to 1.5A, update the USB PD source
limit accordingly and set the boost limit to 1.65A.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38603 chrome-os-partner:39202
TEST=make buildall
run on a P4 modified board with BQ25890 and see the battery charging and
the system running on AC and battery. Plug on C-to-A receptacle adapter
and see 5V.
Change-Id: Id28c9dbd155fe5aedc328bf5ab4da4420495e1f5
Reviewed-on: https://chromium-review.googlesource.com/266021
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Remove all Ryu Proto 4 specific support to make space for Proto 6
configuration : support for both D12 and B8 as PMIC_THERM_L GPIO,
old SuperSpeed mux config.
People with P4/P5 boards can use the ryu_p4p5 board support instead.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38333
TEST=make buildall
Change-Id: I0c5ab5e098d0e4828bee8f576461cd75bbb7b422
Reviewed-on: https://chromium-review.googlesource.com/266020
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Previously the TX and RX queues were being accessed from two
different locations without locking, which is wrong. This
moves the access to a single location in a deffered hook and
calls that hook from the old locations. The result is
correct, simpler, and not much slower. It also reduces time
in the USB interrupt handler by moving the memcpy from packet
to queue out to the deferred hook.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Verify that USB streams still work on Ryu and discovery-stm32f072
Change-Id: I6ea53d7c40b42c6112e86a7886f3b888408f72b7
Reviewed-on: https://chromium-review.googlesource.com/264763
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
The lightbar traces are quite verbose when going through AP power cycles
and prevent people from debugging the current power issues.
Let's turn them off by default, real lightbar lovers can still use
the "chan" command to re-enable them.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=mkae buildall
Change-Id: Ia91f1f9ea2c62a35a0d64e06d377f137ba69fc5e
Reviewed-on: https://chromium-review.googlesource.com/265145
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
When shutting down the MAX77620 PMIC by asserting its SHDN pin, the
EN_PP3300 output of the PMIC (GPIO3) is not driving low keeping the PP3300
rail up. Workaround that issue by removing the pull-up on EN_PP3300 when
we assert SHDN.
Revert the previous CL 263958 aka "ryu: workaround MAX77620 shutdown issue",
in order to use a better workaround which ensures that the power rails
sequencing at startup
Detect the PP1800 rail going up and down by reading the HPD_IN gpio
state (which has a pull-up tied to PP1800), then enable/disable
EN_PP3300 in sequence.
The code using an interrupt on HPD_IN is enabled only on P5,
and as a downside, it is killing the base charging on those boards.
Indeed HPD_IN(C1) is hijacking the EXTINT1 which used to be connected
to the LID_OPEN (E1) GPIO used for the base detection.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38689
TEST=on both P4 and P5 boards, do various power cycling sequences of the
AP using the "apshutdown" and "powerbtn" commands.
Change-Id: Icad6e9ae6a08d76cbfd19f97dd7c129bf43037d8
Reviewed-on: https://chromium-review.googlesource.com/265186
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Update EC board configuration for P5 boards :
- PMIC_THERM_L GPIO used for PMIC shutdown has moved.
- add 5V regulator control (used for VBUS only)
- the Type-C superspeed muxes control changed
- add a temporary pull-up on EN_PP3300
- add new FW_DEBUG_MODE GPIO
Try to be compatible with both P4 and P5 by detecting the board variant at
runtime.
At EC startup, USBC_SS1_USB_MODE_L/USBC_SS2_USB_MODE_L/USBC_SS_EN_L (aka
PD3/PD9/PE0 aka MUX_CONF0/1/2) now default to low level rather than high
(as the new default value on P5), but they are reset to the correct
value when initializing the PD task (high for P4, low for P5+).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38330
TEST=Ran on P4, check board ID on P5 PCB.
Change-Id: Ie9010805a91362c2b4d5eddd825d452d6ccc5b28
Reviewed-on: https://chromium-review.googlesource.com/262310
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Add charge ramp module to samus. For BC1.2 DCPs allow ramping
up to 2A, and for BC1.2 SDPs allow ramping to 1A.
BUG=chrome-os-partner:34946
BRANCH=none
TEST=tested with a variety of BC1.2 chargers, type-C only chargers,
and PD chargers to make sure we always stabilize charging at an
appropriate current limit.
Change-Id: I63d4ba38f2e137aff32831386f1bde2cc7c57850
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/249934
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Make new VBUS charge supplier for Samus and Ryu which allows
default 500mA charging when VBUS is present. Before this was
accomplished via the type-C supplier, but type-C supplier should
only be used for 1.5A and 3A pull-up. VBUS supplier is lowest
priority so that any other supplier will take precedence over
the default charging rate.
This work is done in preparation for charge_ramp module where
we don't want to ramp for typeC supplier.
BUG=chrome-os-partner:34946
BRANCH=samus
TEST=make sure we can boot without battery on samus, and test
other chargers including legacy chargers, zinger, and donette.
Change-Id: I89f1e9520e4bf9e5debbaf8dd2de1262154eecf8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/250312
Reviewed-by: Shawn N <shawnn@chromium.org>
When inductive charging just starts, there might be a blip on
CHARGE_DONE signal and it'd cause our charging control logic to shut
down charging. Fix this by waiting for a second before we start
monitoring CHARGE_DONE.
Also, once we see CHARGE_DONE=1 and disable charging, CHARGE_DONE will
go low. Handle this by ignoring all subsequent CHARGE_DONE change until
the next time the lid is opened.
BRANCH=Ryu
BUG=None
TEST=Pass the updated unit test.
TEST=Charge a base on Ryu P3.
Change-Id: I9d911cd689d8e88ebcd66e6eca7c86dd70704880
Signed-off-by: Vic Yang <victoryang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/243365
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Create optional config to remove 'hash' console command and undef it
for a few space-constrained boards (ryu*, samus_pd).
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual,
- compile for ryu, samus_pd and save ~400bytes
- 'hash' command no longer appears as a console command
Change-Id: I054fd4473911dd362c2c1d171ee7aaad859d893a
Reviewed-on: https://chromium-review.googlesource.com/238433
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
For P3, we'll use PI3USB9281A, which fixes the I2C clock problem. Let's
remove the workaround and leave the clock enabled all the time.
BRANCH=Ryu
BUG=chrome-os-partner:31526
TEST=Boot on Ryu
Signed-off-by: Vic Yang <victoryang@chromium.org>
Change-Id: I05a3ebbff82282b69e3c5573608e500a34d370c0
Reviewed-on: https://chromium-review.googlesource.com/231180
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This enables forwarding of the local PD/EC console
over debug USB. It gates the console functionality
based on the CCD mode that is set.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable partial CCD mode on ryu and verify that it is
enumerated by the host correctly, but doesn't respond
to console input, and doesn't generate output.
Enable full CCD mode on ryu and verify that it is
enumerated and that the console works as expected.
Verify that the console still works by default on the
discovery-stm32f072 board.
Change-Id: I0325ce9689486c41387d6075330be1d7d42f1d42
Reviewed-on: https://chromium-review.googlesource.com/229342
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This provides a framework for additional work. It
exposes an API (ccd_set_mode) that can be used by the
PD code to enable Case Closed Debug. Enabling CCD will
result in the USB 2.0 lines on Ryu (proto 2) to be
disconnected from the AP and for the USB peripheral to
be enabled and connected to the host. The result is
an enumerated device with no interfaces.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable CCD ryu_p2 and verify that it is enumerated
by the host correctly. This requires a reworked
Ryu (proto 2 with pullup).
Change-Id: I1fbecdd5f94a61519cfc18c5e087892c6bd77fde
Reviewed-on: https://chromium-review.googlesource.com/229139
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This simply renames ryu to ryu_p1, and ryu_p2 to ryu. 'ryu_p1' will be
kept for a while and will be decommisioned when most developers make
switch to the new boards.
BRANCH=None
BUG=chrome-os-partner:33583
TEST=Build ryu and boot on P2 board.
Change-Id: Ief61c64c6aefdaeae76ac7b86e0ea28131810aa1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229291
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The battery cut-off is achieved by putting BQ27742 in SHUTDOWN mode.
BRANCH=None
BUG=None
TEST=Unplug AC and do 'cutoff' in EC console. The EC console goes
unresponsive.
Change-Id: I4a1aa359d79333d47aaf53b685a52960e5dfd652
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225007
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is needed for inductive charging to work.
BRANCH=None
BUG=chrome-os-partner:31392
TEST=On Ryu, close the lid and check BASE_CHARGE_VDD_EN is toggled.
TEST=Open the lid and see the AP booting.
Change-Id: Ib153c08a803088b832c7d65261c71605c3378d5f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/224804
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When the cable flip button is pressed, instead of only flipping on
Plankton side, we should also signal the port partner to flip. This is
done by sending a custom VDM. Upon receiving the flip VDM, the port
partner is responsible of flipping the DP/USB polarity.
Note that the "flip" here only affects the superspeed lanes. The CC
lines polarity is not changed. We need this for factory test automation,
and this "flip" function should only be used for testing purpose as it
clearly violates the USB PD spec and it only works on devices that
accept the custom flip VDM.
BRANCH=Samus
BUG=chrome-os-partner:32163
TEST=COnnect Plankton and Ryu. Press the button on Plankton and make
sure the polarity GPIOs on Ryu are negated.
Change-Id: I7ee5ea70067de4f422a7478623fe7fe8d3724372
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/223325
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add support for enabling Vconn on Raiden ports by defining
CONFIG_USBC_VCONN. This is enabled by default for ryu, samus,
and fruitpie.
BUG=chrome-os-partner:30445
BRANCH=samus
TEST=Load onto samus. Make sure we can still charge from zinger.
Plug in type-A to type-C adapter with pulldown and see that samus
becomes power source. Do a gpioget and verify that only one VCONN
GPIO is enabled (low), and the VCONN that is enabled is opposite of
the polarity queried by pd 1 state. Try both ports, both polarities
and make sure the correct VCONN gpio is enabled.
Change-Id: Icea4c18b9c813cf7e8e21fd4f455bbd5fb4dbc91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/222850
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
