Add CONFIG_LTO to use GCC Link-Time Optimizations to try to reduce the
flash footprint of the firmware.
Add additional protection to some functions/data to avoid removal by the
linker when their usage is not obvious.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall (with and without LTO enable on all boards)
Change-Id: I586b8c1eda4592b416c85383b65153c1d5ab0059
Reviewed-on: https://chromium-review.googlesource.com/271291
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
This adds the option to use one 16-bit timer for watchdog helper when
using 32-bit hwtimer. With this, a debug message is dumped before
watchdog fires and we can easily see the task hogging the processor.
BRANCH=None
BUG=None
TEST=On Ryu P2, 'waitms 3000' and see debug message before the EC
reboots.
Change-Id: I498f63a105a0ba1ab7ec7d274dc8b1f16a44140f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225253
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This mostly reuses chip drivers for STM32F and STM32F0. Since this chip
doesn't fit either STM32F or STM32F0, let's use symlink to specify which
drivers to use for STM32F3.
This is just the preparatory work and it's not verified on a chip yet.
BUG=chrome-os-partner:32660
TEST=make buildall to make sure this doesn't break anything
BRANCH=None
Change-Id: I709ed49265e8f84552251a97d03b9b98496de99e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/221412
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Some STM32 variants have a 32-bit timer in addition the bunch of 16-bit
timers.
Add the option to use the 32-bit timer as the system clock source to
lower the overhead of the timer code compared to a pair of 16-bit
timers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run the EC on STM32F072 Discovery board with 32-bit TIM2 as the
clock source.
Change-Id: If55c4e23a3f68dd8f6ca32e93f3a27c1743c767b
Reviewed-on: https://chromium-review.googlesource.com/189861
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
