The BMI160 driver requires that the macro I2C_PORT_ACCEL is defined.
This commit simply defines that macro and defines a matrix to rotate the
sensor data into the standard frame.
BUG=b:79715267
BRANCH=master
TEST=Flash nocturne, verify that the BMI160 initializes successfully.
Verify that when device is struck from the left edge, positive
acceleration is seen on the X axis. When device is struck from the
bottom edge, positive acceleration is seen on Y axis.
Change-Id: I6407b21fdfe311fa8ac7d83a8050ebfb27b4e0d8
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1059535
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Usually, we enable CONFIG_FPU on NPCX, which requires larger
stack size. Also, NPCX has very deep call patch in I2C transactions
(in particular, I2C recovery path), so it generally requires larger
stack.
To make the code fit, however, we need to reduce the accelerometer
fifo depth from 1024 to 512, on a few boards.
BRANCH=none
BUG=b:75234824
TEST=make buildall -j, stackanalyzer result on poppy looks a little
better.
Change-Id: I37b5a2a97a760dc4fd225253c23962d74e25605a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/967963
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
After we set TE (CL:958295), rt946x terminates charging when
the charge current is below IEOC in constant-voltage mode.
When AC is plugged and rt946x terminates, we see cases that
battery SOC falls below BATTERY_LEVEL_NEAR_FULL but rt946x doesn't
re-enable charging yet, which leads to amber LED. The Chrome OS UI
might also show battery is not full in this case.
Let's clamp the reported battery SOC in this scenario to
avoid user confusion.
BUG=b:77870927
BRANCH=scarlet
TEST=When AC is on, charge terminates, and BATTERY_LEVEL_NEAR_FULL
is hit, confirm battery SOC is overwritten.
Change-Id: I4575e562873d149d6f349ddb578334d107e21776
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1055194
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
EC can't be waked up once it enters hibernate. Need to figure out the
cause. Disable it temporarily in order not to block others.
BRANCH=none
BUG=b:79348203
TEST=Ran "help" on console and not "hibernate" command.
Change-Id: Ifba2b95df26b03e4389616ebb3fc217bb5a24d54
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1050748
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
zoombini does not have MKBP enabled, it's nonsensical to have the sensor EC
side FIFO enabled. while it does compile (currently) it makes no sense to have
one without the other.
The next patch in this series will add more cross coupling between them (MKBP
set_gpio time will have to be communicated to the sensor fifo code). And
buildall is failing due to this half inclusion.
This patch disables FIFO stuff on zoombini as a fix. With that we also need
to disable the vsync sensor, since that depends on FIFO. #ifdefs everywhere!
TEST=FIFO stuff will not get compiled in when there's no MKBP
TEST=Next patch doesn't fail buildall anymore.
BRANCH=master
BUG=None
Change-Id: I6877fd131b84e9d42f32c5628c928a1355a5774c
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1055189
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
This patch promotes board/nami/keyboard_backlight.c to common
directory.
Board customization is done via board_kblight_init callback.
It currently supports two drivers: direct PWM control and lm3509.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:78360907,b:78141647
BRANCH=none
TEST=On Nami (for lm3509) and Sona (pwm), verify the followings:
1. Alt + brightness up/down works
2. After suspend-resume, brightness is restored
3. Lid close/open
4. After screen is off, keyboard backlight is turned off
Change-Id: I584c06e8702fe7b289999698f277311cfd3400bd
Reviewed-on: https://chromium-review.googlesource.com/1051027
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
This patch adds a HOOK_INIT handler which reads CBI. This handler runs
as early as I2C controller is ready so that all subsequent code can refer
to cached CBI.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify CBI is read reliably on Nami at boot.
Change-Id: I979947d6bd63ce0cdc1400ba561c543d9ed7b40e
Reviewed-on: https://chromium-review.googlesource.com/1054341
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
When an incoming message is complete, store it in a
internal circular buffer and notify the AP so the
message can be read out.
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:76467407
BRANCH=none
TEST=Write different type of messages from one EC to another EC
using ectool. Also use ectool on the second EC to verify that
they are received correctly.
CQ-DEPEND=CL:1030226
Change-Id: Ie4370b0c954befe81a055cd5dff7d7f13dbefbd0
Reviewed-on: https://chromium-review.googlesource.com/1030227
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add CEC stub implementation and enable it for Fizz. All
it does is print a message when the driver is initialized.
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:76467407
BRANCH=none
TEST=Check that "CEC initialized" is printed on the
console when the EC boots.
CQ-DEPEND=CL:1030219
Change-Id: I1cf674e664e091354e344e0c08a69bd09f415904
Reviewed-on: https://chromium-review.googlesource.com/1030220
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
The Fizz hardware has three pins for CEC. One GPIO is used
as a pull-up. It is always an output and always high. The
second GPIO is a data output. The third GPIO is the data
input that can also be configured as a timer input (TA1).
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:76467407
BRANCH=none
TEST=Read and write the newly added GPIOs using ectool
Change-Id: Ia33b36a0cdaa40fd1a4f7aa66a092b5833bf5cf8
Reviewed-on: https://chromium-review.googlesource.com/1030219
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
This patch adds an interrupt handler for a tablet switch and an init
hook to enable the interrupt.
The handler does the typical tasks for convertible devices: 1. sets
tablet mode then 2. disables peripherals if tablet mode is on.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:77298177
BRANCH=none
TEST=buildall. Verify on Nami.
Change-Id: If7fb5ea15f388d2b6084d800d2bc05efafd1945e
Reviewed-on: https://chromium-review.googlesource.com/1043057
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
This patch refactors motion_lid so that EC can decide to use lid angles
to set tablet mode at run time.
Then, it implements board_is_lid_angle_tablet_mode to enable the feature
for Nami and Vayne.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:77298177
BRANCH=none
TEST=Verify on Nami.
Change-Id: Ib717911a16fe031aa6c6ede731e6aa722d32d022
Reviewed-on: https://chromium-review.googlesource.com/1024914
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
PD is enabled so don't need it.
BRANCH=none
BUG=b:74395451
TEST=Did "gpioset EN_PP5000_A 1" before the folllowing tests:
* Verified USB boot
* Plugged adapter to port-0/port-1/both and saw charging
* Plugged USB device to port-0/port-1/both and saw sourcing VBUS
* Plugged adapter to one port and USB device to another port
* Plugged USB disk to port-0 and booted into kernel
* When AP off, not sourcing VBUS to USB device
* Rebooting AP still works
Change-Id: Ib878960fb302d85549735a395f75cc8d045d45f2
Signed-off-by: Tom Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1042621
Commit-Ready: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Port 0:
TCPC: ANX3429
PPC: SN5S330
BC1.2: PI3USB9281
Port 1:
TCPC: PS8751
Power switch (sink): NX5P3290
Power switch (source): NX20P5090
BC1.2: PI3USB9281
Charger: ISL9238
BRANCH=none
BUG=b:74395451
TEST=make buildall -j
TEST=Did "gpioset EN_PP5000_A 1" before the folllowing tests:
* Plugged adapter to port-0/port-1/both and saw charging
* Plugged USB device to port-0/port-1/both and saw sourcing VBUS
* Plugged adapter to one port and USB device to another port
* Plugged USB disk to port-0 and booted into kernel
* When AP off, not sourcing VBUS to USB device
* Rebooting AP still works
Change-Id: Icde5e24c2cda3d0f2046486528a210af84befcca
Signed-off-by: Tom Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/969701
Commit-Ready: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
The ACOK_OD is a required signal of the charging state machine. EC
can't always hold it low; however, it breaks the charging state.
Make it back to EC input. There are some side-efforts, mentioned in
the bug.
BRANCH=none
BUG=b:78035750
TEST=Plugged/unplugged AC when AP is on/off.
TEST=Verified the power sequence still works.
Change-Id: I039af9cdb86cfb509f2580e6f57d82309825dac1
Signed-off-by: Tom Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1042620
Commit-Ready: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When we support the lowest power mode for Nuvoton in the next spin, we
will shed the TCPC/PPC power rail during hibernate. Before we drop the
power for the PPCs we need to ensure that Vbus is lower than the
hard-coded 6.8V dead-battery mode over-voltage threshold, otherwise we
will lock ourselves out of power.
BRANCH=none
BUG=b:79218851
TEST=verified that yorp renegotiates Vbus to 5V when entering hibernate
via ec `hibernate` cmd.
Change-Id: I4a98573eefb5757eea02dc48c64d5f9358b5e0b7
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1047954
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Keep the timestamp of the latest power lost. Add a handler to wake
the chipset task to check if power lost stays low for a while (the
time between now and the latest power lost is longer than a period).
BRANCH=none
BUG=b:78455067
TEST=Toggle EC GPIO SYS_RST_L for a low pulse to execute PMIC reset
sequence and verified AP reset but not a transition S0 -> S5.
TEST=Toggle EC GPIO PMIC_KPD_PWR_ODL and SYS_RST_L for a low pulse
(see power_off function) to execute PMIC shutdown sequence and verified
a power-lost transition S0 -> S5.
Change-Id: I8ed789d701e834195865bfdf2d302388d42618d2
Signed-off-by: Tom Wai-Hong Tam <waihong@google.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1028831
Commit-Ready: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This makes the EC listen to the AP_RST_REQ GPIO from AP. The rising
edge interrupts to trigger a hook to call chipset_reset().
As the hook task will be preempted by the chipset task, it adds a
flag bypass_power_lost_trigger to avoid triggering to S5 as the
chipset state machines sees power lost during the reset.
So far the chipset_reset() implementation is to do a cold reset;
will be revised to a warm reset after the PMIC registers are
reprogrammed.
BRANCH=none
BUG=b:74395451
TEST=make buildall -j
TEST=Ran 'reboot' on AP console which toggles the GPIO.
Change-Id: I946cb029541ce018a8ed1ce25681d38998a7f4b6
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1023986
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
On newer boards, FP_RST_ODL is no longer Open-Drain and has a 100k
pull-down. Drive it as push-pull.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=poppy
BUG=b:79277207
TEST=On ZerbleBarn, verify that the sensor comes up, has the right HWID
and can capture images.
TEST=On new boards, do the same.
Change-Id: I45e1ba41a7649e0682e3ea11dd0159f666286bba
Reviewed-on: https://chromium-review.googlesource.com/1049545
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
we need to configure EC_PROCHOT_ODL as an input because the EC isn't
driving it correctly. we changed the polarity of EC_PROCHOT for atlas
and similar boards, but the EC codebase has this hard-coded as
active-high.
this is a short-term fix until we implement a more general PROCHOT
"polarity" feature.
BUG=b:78911901,b:79266467
BRANCH=none
TEST=checked voltage drop across in-line resistor on EC_PROCHOT and
AP can now run above 400MHz
Change-Id: I8c3224c62ea7af4f386062d39c248d418e73fa53
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1045556
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
When cr50 resumes from deep sleep term_enabled is reset to 0, but not
all of the s3 termination settings are reset. Some of them are, because
some of the gpios are defined in gpio.inc and cr50 will handle setting
those up during init, but others like the sps pulldowns aren't. At this
point, the term_enabled setting does not actually match the state of
enabled terminations.
After deep sleep reset if the AP is on, ccd update state will try to
disable the s3 terminations, but term_enabled is 0, so s3_term thinks
they're already disabled and wont do anything even though some of the
terminations are actually enabled.
This change initializes all of the s3_term stuff to disable during hook
init. This way things are reset so they won't interfere with sps_init.
This will also make sure to align the system state with term_enabled,
before the ccd hook starts getting called. It is safer to start with
disabling the terminations, because it wont interfere with tpm
communication if the AP is on. If the AP is off, ccd_update_state will
re-enable the terminations around a second after init.
BUG=b:62200096,b:79214702
BRANCH=cr50
TEST=firwmare_Cr50DeepSleepStress.reboot on bob
Change-Id: I9a90c7f7703b1406b4c494db448a8ac84d040d1c
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1043152
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
It was observed on yorp that connecting AC when EC is in hibernation
does not always reliably wake the EC up. The reason for this seems to
be that USB_C0_CHARGE_ON from ANX7447 is not asserting SINK_CTRL and
PPC does not pass through ACIN and thus ACOK_OD remains low.
This change ensures that SINK_CTRL is enabled on all the ports before
EC goes into hibernate state.
BUG=b:79173959
BRANCH=None
TEST=Verified that EC wakes up from hibernate reliably with AC
insert.
Change-Id: I14ff2c89511993fec53462ac606b92e5d9438739
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1043076
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
When hibernate is run from EC console or using key combo, AP might not
actually be in shutdown state. Thus, add a call to force chipset
shutdown in board_hibernate and let AP drop down to S5.
BUG=b:79171681
BRANCH=None
TEST=Verified that hibernate with AP in S0 does not result in EC
waking back up.
Change-Id: I4103c51afb42944e05ec3965b421730fac3f867a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1041278
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Only USB port 0 is capable of device mode, so ignore data role
swaps to other ports.
BUG=b:78308749
BRANCH=eve
TEST=manual: ensure OTG pins are not asserted with data role swap
on port 1.
Change-Id: I07a331af11c3ce599a75517a5ba0ff2716987545
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1035424
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Configure switchcap every time we're about to change the signal,
just in case it forgot.
Feel free to revert this after b/77957956 is fixed.
BRANCH=none
BUG=b:77957956
TEST="i2cxfer r 0 0xd0 0x2" never shows 0x70, even after a bad brownout
(like "gpioset EN_PP5000_A 1" on an unreworked board)
Change-Id: I8994cd402ce96d8bf4e436dadfc0e572e7f77a85
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024501
Commit-Ready: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
This is the power sequence for rev-0 board. Confirmed the behavior of
reprogramming the PMIC registers to enable the instant reset and
shutdown.
BRANCH=none
BUG=b:74395451
TEST=make buildall -j
TEST=Tried the following cases:
* Cold reset:
$ dut-control cold_reset:on sleep:0.2 cold_reset:off
Result: G3 -> S0
* Long power press to shutdown:
$ dut-control pwr_button:press sleep:8.2 pwr_button:release
Result: S0 -> S5 -> G3
* Long power press to power-on but then shutdown:
$ dut-control pwr_button:press sleep:8.2 pwr_button:release
Result: G3 -> S0 -> S5 -> G3
* Short power press to power-on:
$ dut-control pwr_button:press sleep:0.2 pwr_button:release
Result: G3 -> S0
* Console command: apreset
Result: S0 -> S5 -> S0
* Console command: power off
Result: S0 -> S5 -> G3
* Console command: power on
Result: G3 -> S0
* Console command: apshutdown
Result: S0 -> S5 -> G3
* Lid open to power-on:
$ dut-control lid_open:no sleep:0.2 lid_open:yes
Result: G3 -> S0
Change-Id: Ia9d44b1dccac66b5b580c08c6c1697ef5989b923
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969702
Add common defines in bip before we pull them into baseboard
to ensure that the diff of the move is clean.
BRANCH=none
BUG=none
TEST=bip builds.
Change-Id: I06333f2b1ad5d2d7bd057e5e8cd459199393ce1d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038897
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Instead of doing I2C traffic in an init hook, move it to a
deferred function to be called outside of INIT_HOOK processing.
(identical to CL:1001474 on eve branch, moved to nautilus board
file)
BUG=b:77336348
BRANCH=poppy
TEST=None
Change-Id: Id9eec4333c6f04141e475b61e5aea7b838dcedf7
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1033614
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
We do not want to erase the OCM flash automatically so we
can ensure that we fix our supply chain issues. Add a command
that will erase the OCM if needed.
BRANCH=none
BUG=b:77658388
TEST=verified command works on yorp
Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1035428
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
