Bip has an I2C mux that we need to set before we can program the ITE8320
chip. Set the dut's i2c mux to pass through to the EC.
BRANCH=none
BUG=b:79533605
TEST=flash bip and reef_it8320
CQ-DEPEND=CL:1054559
Change-Id: I690aa253c757c37dfb276d5be897b92a9aa1545e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1054560
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Instead of fetching incoming CEC messages using a specific read
command, extend the standard mkbp event so the CEC message can
be delivered directly inside the event.
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:76467407
BRANCH=none
TEST="ectool cec read" still working with a kernel that has support
for the increased mkbp size.
CQ-DEPEND=CL:1046186,CL:1051085
Change-Id: Id9d944be86ba85084b979d1df9057f7f3e7a1fd0
Reviewed-on: https://chromium-review.googlesource.com/1051105
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of e.g. "ectool cecwrite", use "ectool cec write" to
not clutter the command list.
BUG=b:76467407
BRANCH=none
TEST=Run "cec read/write/get/set" and make sure they still
work.
CQ-DEPEND=CL:1030218
Change-Id: Id515782f5a5ff0861fb95ab63c45dc8ab153f0bb
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1046185
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
We might use this in the kernel, so it's nice to have a diagnostic
command for it too.
BRANCH=none
BUG=chromium:836279
TEST=`ectool kbinfo` on kevin and scarlet
Change-Id: I746badf0d2be53d471592a2ca0d7b8ff8070f7a1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1038729
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
When using unified images, it might be confusing to have a single
board name in the tool version. Since tool version was added to check
for compatibility, it is sufficient to look at the sha versions
without the actual board name.
BUG=None
BRANCH=None
TEST=Verified that "ectool version" does not report board name in
tool version.
Change-Id: I862956791706f8a8d508b780bf050caee7c7ccd2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1036114
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
In this CL, we changed chip variants npcx7m6xb to npcx7m6fb and npcx7m7w
to npcx7m7wb for better clafiication since it introduced new parameter
"b" for chip generation in the same family series.
In new npcx7 series naming rule, it follows:
Format: NPCX7(M)(N)(G/K/F)(B/C)
param M: 8: 128-pins package, 9: 144-pins package
param N: 5: 128KB RAM Size, 6: 256KB RAM Size, 7: 384KB RAM Size
param G/K/F/W: Google EC depends on specific features.
param B/C: Chip generation in npcx7. (Generation A is ignored. It
follows nameing rule in npcx5.)
The all chip variants of npcx7 used in boards are also listed below:
npcx7m6g - for npcx7 ec without internal flash on npcx_evb.
npcx7m6f - for npcx7 ec with internal flash.
npcx7m6fb - for npcx7 ec with internal flash, enhanced features.
npcx7m7wb - for npcx7 ec with internal flash, enhanced features + WOV.
BRANCH=none
BUG=none
TEST=No build errors for npcx7 series.
Change-Id: I896ee33209efa5d7157c90515005db5f36318c76
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1025471
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Also implement a few remaining usb function for bip
BRANCH=none
BUG=b:75972988,b:76218141,b:74132235,b:78344554
TEST=verified yorp still functions
Change-Id: I201408b5db689ac4a5bcab0011bc38698271b851
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1024279
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
When issuing a host command whose request packet length is equal to the
maximum size (ie max_request_packet_size as returned by
EC_CMD_GET_PROTOCOL_INFO), the command currently fails with STM32H7 over
SPI host protocol.
The finger template upload through the EC_CMD_FP_TEMPLATE host command
fails due to the issue as it 'optimizes' the chunk length to the maximum
size. For now, workaround this issue by removing a 32-bit word (aka 4 bytes)
to max_request_packet_size, so we never hit this corner case.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:78544921
TEST=On Meowth, run 'ectool --name=cros_fp fptemplate finger0.bin'
and see it succeeding.
Change-Id: I52072ddeb12534045c37ab30df301a60c8841199
Reviewed-on: https://chromium-review.googlesource.com/1026680
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Use servo to boot EC into the flashing mode. Use the unified control
ec_boot_mode to do so.
CQ-DEPEND=CL:1018206
BRANCH=none
BUG=b:68707064
TEST=Ran the flash_ec script on Cheza using servo-micro
TEST=Ran the flash_ec script on Meowth using CCD, with some servo
overlays to drive the ccd_ec_boot_mode control
Change-Id: I32dfe5baa82dd842b5237f38ea971c09e91c47d3
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1020159
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Without this, we see this line when running flash_ec.
util/flash_ec: line 787: [: =~: binary operator expected
These kind of tests require double brackets.
BUG=b:77825616
BRANCH=none
TEST=run util/flash_ec using servo_micro on staff.
Change-Id: I6baecec2252276ac06992fd2b2e50f74d55805f2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1018560
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Since the proper signer utility has been introduced in the chroot,
there is no need in generating reduced command option set when
building a self signed image.
Also, the same manifest can be used for all images, self signed or
signed using a fob. The manifest needs to be tweaked for the self
signed images to match the test Key ID.
Since the same base manifest is used for all signings, there is no
need to support the "poor man's json parser" any more.
Rearranged build.mk to accommodate new logic, and added some comments.
BRANCH=cr50, cr50-mp
BUG=b:78212718
TEST=verified that images with proper header version are created when
both self signed and signed with a private key coming from the
signing fob.
Change-Id: I5a1f8a223098b0a6c830ef24ffe380fc0badcafa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1017238
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
ec3po writes to the user pty, which may or may not be open.
Since ptys have limited buffer space, we need to avoid
writing to them if they will never be drained.
ec3po now looks for HUP to indicate whether the pts is opened
or closed, and reads/writes accordingly.
BRANCH=None
BUG=b:76111225
TEST=dut-control ec_board:fizz x 400
Change-Id: Icbecb2e42b261659a006eb1b9fc6dd73490a2218
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1014792
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
When the FLPRG# strap pin is set to active low, and npcx7 chip is reset,
it will enter uut mode. This CL adds the host tool to communicate with
npcx chip in uut mode to flash ec firmware via UART port.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=
------------------------------------------------------------------------
1. Connect the servo connector (J24) on npcx7 EVB to servo board v2 via
flex cable.
2. Manually turn the switch SW1.6 to "ON" on npcx7 EVB.
3. Reset ec by issuing Power-Up or VCC1_RST reset.
4. Manually turn the switch SW1.6 to "OFF" on npcx7 EVB.
5. Move npcx7_evb from array BOARDS_NPCX_7M7X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. "./util/flash_ec --board=npcx7_evb."
Change-Id: I2c588418e809e59f97ef4c3ad7ad13a3fef42f11
Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/952037
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: Alexandru M Stan <amstan@chromium.org>
Tested-by: CH Lin <chlin56@nuvoton.com>
Tested-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
flashrom --get-size seems to return a size of 0 in some failure cases.
add specific handling of this case so we don't proceed and end up
failing with a somewhat misleading message like:
Error: Image size doesn't match: stat 524288 bytes, wanted 1048576!
BUG=none
BRANCH=none
TEST=flashrom now fails with "chip size is 0" instead of complaining
about wanting a 1048576 byte image.
Change-Id: Iab4d0843d86ceec9f0ca482d9e060a33c7a58c7a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1011823
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Cr50 is pretty slow to update it's ccd state right now. Add some delays
when flashing devices using uart bitbang, so cr50 will have enough time
to enable bitbang and configure the uarts correctly.
Also add some commands to cleanup to cleanup the cr50 state.
BUG=b:77825616
BRANCH=none
TEST=run util/flash_ec using ccd on reef and scarlet.
Change-Id: I1c84e36c9bb290c49fd15971c7f61f9e1151a424
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1006484
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
A recent codebase change included the test RMA reset server public key
in the Cr50 image by default.
Prod images must not include the test key, and luckily recent
modifications of the cr50-codesigner utility allow to swap the keys
before signing. This patch adds the command line option for swapping
the keys and a check to ensure that the signed image includes the
prod key and does not include the test key.
Note that cr50-codesigner would fail to sign if the swap was requested
but the test RMA key was not found in the input .efl file. Thus both
conditions are verified: that the original image includes the test key
and that the signed image includes the prod key.
BRANCH=none
BUG=b:73296144
TEST=prod signed an image, verified that it can be RMA reset using the
prod RMA reset server.
Change-Id: Ic084d0c5e1de9f027db05c63f82542c2b7cbd916
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1000756
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When building EC targets in the setups where the Cr50 codesigner
utility is not present let's just bypass the signing step.
Also removing bitrotten source code of the old codesigner.
BRANCH=none
BUG=chromium:830302
TEST='make buildall' succeeds even if cr50-codesigner is not available.
Change-Id: Ic6c4988455bcee6c45504e1fe781f6e03636d57a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1005401
Reviewed-by: Allen Webb <allenwebb@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We found a symptom that iteflash always programming EC failed
on a specific host machine.
For this failed case, it is caused by the incomplete read from
ftdi_read_data(). For example, we want to read 32 bytes by just
call ftdi_read_data() one time, but ftdi_read_data() may return
(number of bytes read) 10 or 20 but just not 32.
This change will call ftdi_read_data() again and again until all
data is read.
Change draw_spinner() function to use fprintf().
We will show percentage increase from 0 percent to 100 percen
during verifying.
Change of flash_ec script:
Move operations of reinitialize ftdi_i2c interface to cleanup()
and we won't miss them if programming is failed.
BUG=none
BRANCH=none
TEST=To run iteflash on that host machine and flashing is done.
Change-Id: Ifa374652870737c8231fce5a699abe033a1f0237
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/979903
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Cheza board doesn't have the SPI guag programming interface. Should use
Uart to flash it.
BRANCH=none
BUG=b:74395451
TEST=Manual, steps:
* Add Uartupdatetool to the PATH
* Build the Cheza EC image
* Run "flash_ec --board cheza" on a reworked Meowth, which uses the
same EC chip as Cheza
Change-Id: Ica0878778314ad016273877683a85a912890161c
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/969419
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
- make sure DBG images could not be signed for prod
When debug image marker was changed from "DEV" to "DBG", the
script checking for this was not updated.
Fix that and also use 'strings' generated output to not require
grep to delineate input binary blobs into strings.
- do not invoke cr50-codesigner as sudo, it is not necessary with
the correct udev rules in place.
BRANCH=none
BUG=b:73296144
TEST=Tried signing for prod a DBG image, the attempt failed. Then
built a non DBG image, signed it successfully.
Change-Id: I7cec2d9eb344b40f7726d7e432689b0c0416dc47
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1000755
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Source code for Cr50 codesigner has been added to the chroot and the
executable is installed as /usr/bin/cr50-codesigner when cros sdk is
created/updated.
Let's use the 'official' version instead of outdated local one.
BRANCH=cr50,cr50-mp
BUG=b:73296144
TEST=verified that properly signed Cr50 images can be built.
Change-Id: Ibc68340a26011c7d5ac028bbee73cd0f2c39c291
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/996512
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
When flash_ec script is run from /usr/bin it could not find
the ec source directory to calculate the basebord. Handle flash_ec
running from /usr/bin by using the default chroot source layout to
find ec platform dir. If dir is not present, then skip baseboard
check
BRANCH=none
BUG=b:77128456
TEST=sudo emerge ec-devutils && flash_ec --board=yorp
Change-Id: Ib7766e5c7ca701f0a209c6e6e6c1a192284b9d0b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/992993
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch adds execution-in-ram, opposite of XIP: execution-in-place
(a.k.a. XIP) to the EC features. It can be currently implied by
CONFIG_EXTERNAL_STORAGE.
BUG=b:77306460
BRANCH=none
TEST=Verify ectool prints EXEC_IN_RAM on Fizz.
Change-Id: I4a7fb3b267864debe59fd211956371eceac57613
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/995968
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch brings in both prod and test RMA server public keys as two
binary files.
A bash script for converting binary blob into C definition is also
provided.
BRANCH=cr50, cr50-mp
BUG=b:73296144, b:74100307
TEST=none yet
Change-Id: I2edd78164b8c912408ac7eda2e0a3a0262a8e81f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/990782
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If a baseboard exists in the build.mk for a board, use that
as the unibuild path.
BRANCH=none
BUG=b:77128456
TEST=tested the following command with correct results:
flash_ec --board=yorp (baseboard)
flash_ec --board=bip (baseboard)
flash_ec --board=grunt (non-baseboard)
Change-Id: Ic4573cb01849275d1333ff9e715f69a4c95444b0
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986753
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
A new ebuild allows to install codesigner as /usr/bin/cr50-codesigner,
let's make use of it instead of manually copied instance of the
signer.
BRANCH=none
BUG=b:74100307
TEST=verified that error message is generated if cr50-codesigner is
not installed, and that signing succeeds once cr50-codesigner is
installed.
Change-Id: I468803443e7b052a8ecb074ee80f63f588888985
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982495
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
