Change samus power supply transition delay for Raiden ports to
80ms since it may take that long to turn off the power supply
when doing a power swap.
BUG=chrome-os-partner:34525
BRANCH=samus
TEST=load onto samus, connect samus to samus and do a power swap.
Change-Id: I20c2cb78f17168a5b69780de4af5ff478f6d5f87
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238961
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For samus, on PD connection or on resume to S0, if we are a sink,
and the other side supports PR_SWAP, then attempt a power swap.
This adds callback functions into board policy file to check
and issue power or data swaps if required by the product.
BUG=chrome-os-partner:31195
BRANCH=samus
TEST=connect samus to zinger and make sure zinger always ends up
as SRC-UFP.
connect samus to samus with both in S0 and see that
they swap power roles once and not data roles.
connect one samus in S0 to one samus in S5 and see that the one
in S5 is sink. then when you boot the one in S5 it switches to a
source.
connect samus to samus with both in S0. do chgoverride 1 on one
side to start charging from the other samus. then on the same
side, turn off the machine (S5) and resume (S0), and see that it
is still charging from the other samus (ie has not switched roles
to source).
Change-Id: Ifab2465fccef77448ac4771a3c2de1c867cbbec4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238302
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Create optional config to remove 'hash' console command and undef it
for a few space-constrained boards (ryu*, samus_pd).
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual,
- compile for ryu, samus_pd and save ~400bytes
- 'hash' command no longer appears as a console command
Change-Id: I054fd4473911dd362c2c1d171ee7aaad859d893a
Reviewed-on: https://chromium-review.googlesource.com/238433
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Check the flash protection at startup, if the RDP is still at level 0
(no read protection) or if the RO partition is not write protected :
- set the write protection on the first 16KB of flash (4 LSB of WRP0)
- push the RDP to level 1, so SWD/serial monitor needs to fully erase
the part before re-writing the code or the write-protection.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34935
TEST=dump the content of the option bytes.
Change-Id: I11af64365a6fbc34327b2e463eb8e2d369ffacd2
Reviewed-on: https://chromium-review.googlesource.com/238262
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Keep track of the high 32-bit of the microsecond time counter to avoid
rollback issues.
Just activate the timer "update" interrupt (aka UIE) and increment the
high word on every update interrupt.
Also disable STOP mode when we are going to roll-over during sleep to
avoid missing the event. Given that's only happening every hour, we
should not waste too much power.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34159
TEST=patch the code to set the initial TIM2 value to 0xFC000000,
wait for 67s, see the counter rolling and the high word incrementing,
then verify that Zinger is still functional.
Change-Id: I3a2f8fc09104d8ac75c581b2abcbcef99344def7
Reviewed-on: https://chromium-review.googlesource.com/238220
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
When battery is full and system is not in S0, then stop charging
and allow battery to power the system. Once battery is no longer
full and requests current, allow charging again. This is to work
around power consumption issues in our AC input path. The charge
override port is stored upon entering S3 and restored going back
to S0 so that the charge override port is not affected by this.
This also fixes lightbar so lightbar checks if battery is full
instead of checking raw percentage. The lightbar is also changed
to use the last tap direction if no charger is plugged in. And
the lightbar tap for battery threshold for turning green is
lowered to 95%.
This also moves some samus_pd board code out of interrupt handlers
and in to deferred functions to minimize time in interrupts.
BUG=chrome-os-partner:34640, chrome-os-partner:34847
BRANCH=samus
TEST=load onto samus. use battfake command from pd console to
set battery percentage. when system is in G3, see that
batt = 100% stops charging, and when batt < 100% it starts
charging again.
tested that we receive host command from EC with battery
information every time battery changes SOC.
Change-Id: Ia8e0721508e34ee3630f5e5b0c2f431a00329caf
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236411
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Make large battery struct array constant to save RAM space
BUG=none
BRANCH=samus
TEST=make -j buildall. check ec.RO.map and see 96 bytes
RAM saved.
Change-Id: I181138eb79138f6e7bb25738c669232cfa0d31b7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238211
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This will also inhibit power-on if no battery is attached.
BUG=chrome-os-partner:31127
TEST=Manual on Samus. Verify that AP continues to boot normally when
charge level exceeds CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON. Verify
that power button presses are ignored when the charge level is below
the threshold, and we return to G3. Also, verify that Samus can boot
successfully to the OS with 1% battery and a 5V @ 500mA charger attached.
BRANCH=Samus
Change-Id: I47cd3903c8cc13282fd5038f9d5fd1e310283ea7
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236022
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Fix task_wait_event() in zinger runtime so that checking for events
fired is done with interrupts disabled to avoid getting an interrupt
that sets an event right after checking for that event.
BUG=none
BRANCH=samus
TEST=load on zinger and plug/unplug ~10 times and see successful
negotiations without any communication errors. note that without this
CL, under certain circumstances, zinger fails to respond with goodCRC
at the right time because the RX interrupt sets the event after
task_wait_event() has already checked it.
Change-Id: I2b43b8e389c6655d2a7a62b791014d1d5d678158
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238092
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add support for alternate functions for nrf51.
Add more register definitions for the nrf51.
Use assertions for conditions that should never happen.
Use BUILD_ASSERT to keep the sources in sync.
Add three more GPIOs to hadoken.
BQ27621_GPOUT - Configurable output from the fuel gauge.
LID_PRESENT_L - The input for the hall sensor.
IND_CHRG_DISABLE - The output to control inductive charging.
BUG=chrome-os-partner:34477
BRANCH=none
TEST=Used gpioget and magnets for LID_PRESENT_L
Used fuel gauge console commands to trigger BQ27621_GPOUT
Tested the assertions with gdb
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Change-Id: I508f79ae45127104fa14f9f75fbf545f226387e4
Reviewed-on: https://chromium-review.googlesource.com/234286
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Myles Watson <mylesgw@chromium.org>
With the type-c connector, it's common for VBUS to make contact before
D+/D-, which can lead to charger misdetection. To work around this, add
a 200ms delay and trigger re-detection when a charger is inserted. This
should fix most misdetects due to unintentional slow plug (though it's
still possible to misdetect if insertion is deliberately very slow).
BUG=chrome-os-partner:34584
TEST=Manual on Samus. Plug in Apple charger 20 times, verify that it is
always detected correctly. Deliberately plug in slowly, verify it is
detected as 500mA SDP port. Repeat tests with various other CDP / SDP
ports to verify detection never over-currents and always indicates a
charger is plugged (or not plugged) correctly.
BRANCH=Samus
Change-Id: I8a776f516d8e7f0cedcb9d8579239eba641cab09
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/237241
Reviewed-by: Alec Berg <alecaberg@chromium.org>
For factory testing, we need a way to simulate unplugging type-C cable.
To do so, we disable VBUS output and pull-up/pull-down on CC lines on
Plankton, so that the CC lines become floating.
BRANCH=None
BUG=chrome-os-partner:32163
TEST=Connect Plankton to Ryu. Try 'fake_disconnect' as SRC/SNK.
Change-Id: I73a7355e078b6aed4b7d281d480e0aedbc8c2db0
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229662
Reviewed-by: Pin-chih Lin <johnylin@chromium.org>
Tested-by: Pin-chih Lin <johnylin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add initial serial driver for mdcp2850 dp->hdmi converter. Driver
implements 'get information' (cmd:0x40) to provide rudimentary method
to test mcdp for functionality and assert GPIO if successful.
Future CLs may expose more serial functionality if necessary.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34122
TEST=manual, when compiles with #define MCDP_DEBUG see successful
serial communication and result from get info.
buf:[00]0x04 [01]0x40 [02]0x00 [03]0xbc
...
buf:[00]0x0f [01]0x40 [02]0x00 [03]0x0e
[04]0x00 [05]0x01 [06]0x01 [07]0x00
[08]0x00 [09]0x00 [10]0x00 [11]0x00
[12]0x00 [13]0x00
family:000e chipid:0001 irom:1.0.0 fw:0.0.0
Change-Id: I35f9d9b0437633d1bd6a6c9fa14413bedb12f5c2
Reviewed-on: https://chromium-review.googlesource.com/235930
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Add internal pull-up to EC_IN_RW to match changes made in DVT.
Doesn't affect earlier boards because a hardware bug prevented
us from reading the correct state anyway.
BUG=none
BRANCH=samus
TEST=make -j buildall
Test on re-worked samus board with DVT changes. Tested PD MCU
can read the correct state of the gpio.
Change-Id: I27952022cfff2d1f7adcb93d4df47d63f1fd5470
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/237305
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Add EC2I control module for emulation board.
The EC2I bridge enables the EC to access the host controlled
module registers (e.g., host configuration module(PNPCFG) and SWUC)
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=EC2I read: Read a logical device page, the results are correctly.
EC2I write: Initialize PNPCFG success.
Change-Id: I900450d4a8c49182c438b69b5e738c12dc437fe4
Reviewed-on: https://chromium-review.googlesource.com/230410
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Previously, handle_vdm_requests could dispatch another VDM message
via send_validate_message prior to main task returning to vdm state machine
(pd_vdm_send_state_machine). While it hasn't been problematic to-date it would
make honoring VDM specific timers or PDO priority difficult.
CL changes behavior so that if VDM being handled requires another VDM to be sent
its copied to the one entry queue (queue_vdm) where it will be
serviced upon VDM state machine entry later.
With this simplification, CL expands interlocks between PDO & VDO.
VDOs are only sent when source/sink is in the ready state & no
incoming packet is on the CC line. PDOs aren't sent when the VDM
state machine is busy.
CL also simplifies VDM console output to come only from request handler which
could save a few bytes.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:30645
TEST=manual,
1. dingdong/hoho still enter mode.
2. Can still update fw.
Change-Id: I2fe8643a6975205b2d0f510f4f1baf2d74c1e190
Reviewed-on: https://chromium-review.googlesource.com/235680
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Change the ENTERING_RW gpio name to match other boards so that common/system.c
sets the gpio automatically when jumping to RW.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: I8290462a73d99dad0a9f5b8de7ea1c0edb56876e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236964
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This addition allows the AP to query whether the PD device is currently
running from RO or RW FW.
BUG=chrome-os-partner:34599
TEST=Manual on Samus. Run 'ectool --name cros_pd infopddev 0' and verify
that correct RO/RW status of Zinger is printed. Verify that the output
matches the index printed by "pd 1 hash" on samus_pd console.
BRANCH=Samus
Change-Id: I4266cae931f5c7855ca0531717c4a18b138b2d62
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236771
Reviewed-by: Alec Berg <alecaberg@chromium.org>
In order to reduce flash size on some constrained boards this CL
modifies the GPIO macro in gpio_list.h to change the name field from
that listed 'name' to the concat of 'port' and 'pin'.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual
1. build with and without CONFIG_COMMON_GPIO_SHORTNAMES
See >500 bytes savings with config option
2. See reduced names for gpioget
Change-Id: I6ed2c1d16aae5923fdf47a1b2dbb2362598a19e0
Reviewed-on: https://chromium-review.googlesource.com/236766
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Fix bug causing tap for battery not to work in G3 when AC
is attached. Problem was that the lightbar was being held
in reset and would not light up.
BUG=chrome-os-partner:34722
BRANCH=samus
TEST=tested on samus with AC attached and unattached in S3
and in G3, tap for battery lights up the lightbar. Also
verified that plugging and unpluggin AC in S3 and G3 causes
lightbar to light up.
Change-Id: I0fbd989399d372d287467200512bbdf2551884d3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236560
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
UART with no DMA is likely to drop RX characters when system is busy. This is
because the UART interrupt is lower priority than the spi_event GPIO interrupt.
We can work around this by enabling the DMA, so no UART interrupts are required
while recieving, since everything will happen in DMA.
This replaces the other patch(CL 236089) which suggested changing UART IRQ
priority.
BUG=chrome-os-partner:33451
TEST=get firmware to poll the EC for keyboard presses, type really fast on the
keyboard, note how no character is lost anymore
TEST=faft dev mode test now passes, faft is able to type "kbpress $(insert args
for Ctrl+D) 1" correctly without missing characters because firmware is loading
the EC with keyboard polls
TEST=While '+'s are scrolling on the EC terminal paste something big like this:
"kbpress 1 1 1
kbpress 1 1 0
123456789012345678901234567890
". Both kbpresses should be interpreted/executed properly(no "kbprss") and there
should be no missing digits in the echo back.
BRANCH=None
Change-Id: I01d4eaa23f10f07083875846ea48c34da2e2f6ce
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236365
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Modify board_set_active_charge_port to return status indicating whether
the selected charge port was rejected. If rejected, zero out its
available charge and attempt to select a different charge port.
Also, reduce the length of related console prints.
BUG=chrome-os-partner:34677
TEST=Manual on Samus. Plug C-to-Arec into port 1, verify that charge
manager does not select port 1 as active and charging icon is not seen
in OS.
BRANCH=Samus.
Change-Id: I56e3337f90c04b93ef7cc9873af6ee0f4b1ffc7d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236361
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Added check for collision just before transmitting on CC line.
To check for collision, RX monitoring is left on all the time
(except when in the act of receiving or transmitting, or in
between receiving and sending a goodCRC), and a
simple check for RX transmission started is used to see if the
CC line is idle or not.
RX monitoring is also changed to only trigger on 3 edges within
20us, as per the PD spec.
When a collision is detected by seeing that CC is not idle, the
transmitting packet is dropped.
BUG=chrome-os-partner:30135
BRANCH=samus
TEST=load onto samus and zinger. make sure we negotiate and make
sure custom VDMs succeed. enabled pings and made sure we stay
alive with pings for a few min.
Also added code to pd_rx_handler to toggle a test point on EVT
board to verify the timing of when we get RX interrupts:
Change-Id: I22d172163319437d3d901e019eda79d4d592f6b8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226118
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In order to reduce flash size on some constrained boards this CL
modifies the GPIO macro in gpio_list.h to change the name field from
that listed 'name' to the concat of 'port' and 'pin'.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34489
TEST=manual
1. build with and without CONFIG_COMMON_GPIO_SHORTNAMES
See 897 bytes savings with config option
2. See reduced names for gpioget
> gpioget
0 E6
0 F2
1 B0
Change-Id: Ife1e1e2bcfa620ba87fe6c1ce2b47fe258c46514
Reviewed-on: https://chromium-review.googlesource.com/234587
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Change backboosting workaround into a new extpower task. This
new task runs exactly what used to be run in a deferred function,
but at higher priority than charger task, which means that i2c
transactions from this new task will occur before charger task
i2c transactions.
This fixes the EC watchdog when writing PD device firmware
because the hooks task is no longer blocked on trying to grab
the i2c mutex for talking to BQ.
BUG=chrome-os-partner:33905
BRANCH=samus
TEST=loaded onto samus and tested remote update of zinger 10 times.
Change-Id: I01d259857aefc6bf456ab217bf46536237bc4008
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/235862
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Ryu sensor hub has asymectric RO/RW images. The first one is very limited
(not i2c master, no sensor drivers, gesture recognition).
Image size is alter to offer more space for the RW firmware image,
compiled with ryu_sh board.
To write RO image and basic RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w /tmp/ryu_sh_loader/ec.bin
To write the expected RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w -i EC_RW:/tmp/ryu_sh/ec.bin
BRANCH=ToT
BUG=chrome-os-partner:33908
CQ-DEPEND=CL:231970,CL:233233
TEST=load on Ryu, confirmed limited operation.
Change-Id: Ib976e2b048935adfb9b2b072c071db5be2bc1c09
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231984
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
After receiving more info from the manufacturer, it appears that
since we're using closed-loop feedback to drive the fan we can
turn it at whatever speed seems to work.
While we're bikeshedding over the startup noise, let's put the
start/min speed back to 1000RPM to help distinguish the startup
chirp from the fan-is-running-now noise.
BUG=chrome-os-partner:32757
BRANCH=ToT,Samus
TEST=make buildall -j
Watch fan speeds while doing things. It still makes noise, but it's
quieter.
Change-Id: I5c21bf9021e4110f31c6dded78852347c4eb6119
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/234755
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
Remove common code across all PD policy layers to select the requested
voltage and build a Request Data Object (RDO).
BUG=none
BRANCH=samus
TEST=Load onto samus and connect zinger. Make sure we request the right
voltage (first 5V, then after initial contract is made, 20V). Make
sure input current limit is set appropriately by checking limit on EC
console using charger command.
Change-Id: Ic6bda5e23b2d7b7d710ffdf085e7fbc1b0c3add9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233673
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Turn on PP5000 when AC is plugged in in G3 so that the PD
MCU can accurately measure the CC voltage.
BUG=chrome-os-partner:33909
BRANCH=samus
TEST=test with various type-C chargers. verify that in G3 the
pp5000 rail is on when AC is plugged in, but off when AC is
unplugged
used reported battery current to estimate that turning on
PP5000 rail in G3 consumes an extra 30mW of power, but that
shouldn't matter much when AC is connected.
Change-Id: I3cdd2aaf3e7688d69a65e5d11e38e5b9cf16e703
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233734
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The new board will move AC_PRESENT to another pin in order to avoid the
[1.052524 Overriding AC_PRESENT with KB_IN00 on EXTI8] problem.
BUG=chrome-os-partner:34024
TEST=EC should react to AC events
BRANCH=None
Change-Id: I5c1110f10a3ed2704593c749cef35ab73fceb3e8
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/234586
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Jerry Parson <jwp@chromium.org>
The power sequence doesn't meet the spec from Intel.
We should delay about 10ms between VccSUS3_3 and RSMRST.
BUG=chrome-os-partner:34411
BRANCH=samus
TEST=build and boot on samus
Change-Id: Ib35e9dfdcfa4cfde2440f85fbeae6ee878465949
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/234404
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If override charge is selected on a port currently acting as a charge
source, but the attached device is also capable of acting as a source,
request a charge role swap and initiate a pending delayed port override.
If the role swap completes successfully and a charge source is found,
the selected port will become the override port. If the role swap fails
or no charge source is found within 2 seconds, the delayed port override
will be lost.
BUG=chrome-os-partner:28343,chrome-os-partner:31195
TEST=Manual on Samus. Connect two Samus units together through charge
ports.
"pd 1 swap power" - put port on test device into source role
"chgoverride 1" - set charge override, verify that role swap takes
effect and charge manager selects PD charge source, 900mA @ 5V
Disconnect charge cable, verify that charge manager goes back to not
charging.
BRANCH=Samus
Change-Id: Iadcc4dc98631661f254245eeff18973df517f652
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231900
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Samus USB ports can't actually act as UFPs, so open switches when in
UFP mode.
BUG=chrome-os-partner:32003
TEST=Manual on Samus. Connect two Samus units, run `pd 1 swap data`,
verify that switches are opened on switch to UFP. Unplug samus and
connect a USB 2.0 device instead, verify that ports are again closed.
BRANCH=samus
Change-Id: I9e1ca58089caf29e419698c8426bf8b72500833a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233711
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The task based approach made sense when it looked like
there would be a case closed debugging task to handle
multiple bridges (SPI/I2C/USART...). I'm not convinced
anymore that that task will be needed, so this
simplification seems good.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic431c287c28d10252246fe9f507d9c5fcc64a077
Reviewed-on: https://chromium-review.googlesource.com/232733
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
This allows the USB SPI bridge to be controlled from the
host at a larger timescale than a single SPI transaction.
This allows the host to signal that many transactions
will take place and that the device should keep the SPI
bridge enabled across them. This allows the device to
hold the AP or other possible user of the SPI bus in
reset while the bridge is enabled.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ifd6f96b0ff47f35d853735d44e255a205b0e677a
Reviewed-on: https://chromium-review.googlesource.com/232732
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
