Commit Graph

14 Commits

Author SHA1 Message Date
Sheng-Liang Song
98a485bf43 cr50: update for Rev1 hardware release
Update the register definitions.

BRANCH=none
BUG=none
TEST="make BOARD=cr50" and "UART ok"

Change-Id: I46bf226caae5cf238b59d5bf31a2fb3611fd31d3
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/232111
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2014-12-15 22:46:13 +00:00
Vincent Palatin
1b1c3089af g: implement GPIOs
Add a driver for the GPIO controller.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:33816
TEST=press the push buttons on the board and see the console text
message and the LEDs lighting up.

Change-Id: Idb408fe1c341beb8a97f2047ba6740e0d40cedf5
Reviewed-on: https://chromium-review.googlesource.com/233307
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2014-12-10 22:14:07 +00:00
Vincent Palatin
dd573030d2 g: update version string
Build the hardware version string from the register definitions,
so I no longer forget to update it.
Check it at runtime against the build version registers.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=On the console command line,
type "version" and see the following string:
"Chip:    g cr50 A1 20141203_224409"

Change-Id: I6d902780d42f2dd18a57ccc08fd4ba4fee5ebc7c
Reviewed-on: https://chromium-review.googlesource.com/233582
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:51 +00:00
Vincent Palatin
4ef1969a50 g: update reset code
- record and display reset cause
- add the hard reset option
- add the scratchpad to store values across reboots.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:33818
TEST=On the console command line, chech the "[Reset cause: xxx]" string
- for the initial reset cause
- use "waitms 4000" to trigger a watchdog reset
- use "reboot soft"
- use "reboot hard"
The "utils" test is now building and passing.

Change-Id: I68c7096e5b7bfd102be89fd8eef6fe20da37a6f8
Reviewed-on: https://chromium-review.googlesource.com/233581
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:41 +00:00
Vincent Palatin
d097e25bf4 g: add watchdog driver
Implement a driver to trigger a watchdog reboot if we are stuck
somewhere. Also display a nice warning when we reach half of the
watchdog period.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=On the console, type "waitms 500" and see nothing,
type "waitms 2000" and see the watchdog warning.
Type "waitms 4000" and see the warning, the platform rebooting.

Change-Id: Iac5d0100febd5eab1ae6cfac5a47ff728ebda3a6
Reviewed-on: https://chromium-review.googlesource.com/233430
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:34 +00:00
Vincent Palatin
9b1b0cb2fc g: fix hwtimer event deadline
We were losing timer events because usecs_to_ticks(deadline) was
clipping the value when deadline was larger than 0x08888888 (deadline is
a timestamp rather than a delay).
The computation of the timer deadline has been modified to avoid the
clipping issue.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:34347
TEST=run on Cr50 with the watchdog activated and no longer see watchdog
warnings.
Run the "timer_calib" test and see that the 1s sleep is 1000038 us :
make BOARD=cr50 tests
fhl ../build/cr50/timer_calib/timer_calib.RO.hex

Change-Id: Id2200a89eb1b72099e536291af321609b24b4777
Reviewed-on: https://chromium-review.googlesource.com/233531
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2014-12-06 01:11:22 +00:00
Vincent Palatin
2777252a20 g: add core reset
Until we implement a proper reset of the microcontroller,
add a reset of the Cortex-M3 CPU core in system_reset() in order to
avoid getting stuck in a weird loop if we get a panic.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=trigger a data abort and verify we are not going into a panic loop.

Change-Id: Ie046379e6a9469bd683fa774cdc9abb10a14e8f1
Reviewed-on: https://chromium-review.googlesource.com/233109
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2014-12-04 20:44:56 +00:00
Vincent Palatin
cd96fddf3f cr50: update for 12/03 hardware release
Update the register definitions.
Note: UART pin muxing has changed.

Should be the final version for rev A1.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=make BOARD=cr50
load the software and see the console working.

Change-Id: Id17f7e00f75a14ab296c745b100b0085aaa79011
Reviewed-on: https://chromium-review.googlesource.com/233108
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2014-12-04 19:19:54 +00:00
Vincent Palatin
a58083c421 cr50: update for 11/20 hardware release
The clock frequency has been update from 26 to 30 Mhz.
Update the register definitions.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=none
TEST=make BOARD=cr50
load the software and see the console working.

Change-Id: I7ccb15491f582173d17739c93ea8c94b05925a6d
Reviewed-on: https://chromium-review.googlesource.com/231129
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-11-21 02:44:41 +00:00
Bill Richardson
806ba91ea4 Cr50: Update/refactor for new HW release
This is fairly large change set to accomodate a new hardware
release. There are enough differences to require refactoring the
registers.h file. Autogenerated constants are now in gc_regdefs.h
and all constant names begin with GC_, while register names are
defined in registers.h and begin with GR_.

Yes, I know the new header files are wider than 80 chars, but we
agreed that was okay in some cases if it makes them more readable
(see commit 3500c28).

BUG=chrome-os-partner:33423
BRANCH=none
TEST=make buildall -j

Build and run on the development board.

Change-Id: I21bd88c490f4f359ad17b5af9d17d8caca8dc9e4
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/230513
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
2014-11-18 23:52:08 +00:00
Bill Richardson
f154a8b95d cr50: Update TODO comments with new bug numbers
Just changing comments, no code.

BUG=chrome-os-partner:33432
BRANCH=none
TEST=make buildall -j

Change-Id: Ibffda40bff23a8c685feaef30a85e19157566245
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229860
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2014-11-14 23:56:44 +00:00
Bill Richardson
e28b6184b1 tweak: Allow "rw" command to read AND write memory.
It's really annoying to have to type two different commands. If I
want to read a location and then write it and then read it back
(which often happens when poking at hardware), then this:

  rw 0x40570008
  rw 0x40570008 14
  rw 0x40570008

is much easier to enter than this:

  rw 0x40570008
  ww 0x40570008 14
  rw 0x40570008

The "ww" command is still there, if you're really attached to it.

BUG=none
BRANCH=none
TEST=manual

Tried the example above. It worked.

Change-Id: I2302ed60df3dd3ec2224afa7c32d997bd2468ec1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229660
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2014-11-14 22:47:13 +00:00
Bill Richardson
9157dd93da cr50: Add support for hwtimer
Implement the API expected by common/timer.c

BUG=chrome-os-partner:33699
BRANCH=none
TEST=manual

Run the "gettime" and "timerinfo" and "taskinfo" and "waitms"
commands. Compare the elapsed time with the real world. They seem
to match.

Change-Id: Ie5acae76780ee09e7dfb6cc0282de25f8063e96f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229642
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2014-11-14 03:03:32 +00:00
Bill Richardson
86c7e2e90a Add initial support for cr50 SoC
The serial console works. Nothing else is implemented yet.

BUG=none
BRANCH=ToT
TEST=make buildall -j

To build,

  make BOARD=cr50 hex

Testing the result requires a development board. I have one. It
works with HW revision m3.dist_20140918_094011

Change-Id: I718d93572d315d13e96ef6f296c3c2796e928e66
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226268
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2014-10-31 22:32:50 +00:00