Commit Graph

9136 Commits

Author SHA1 Message Date
Jett Rink
dbfa3cf2dc lpc/espi: define new targeted config options
Introduce CONFIG_HOSTCMD_LPC and CONFIG_HOSTCMD_ESPI which will replace
CONFIG_LPC and CONFIG_ESPI. Today the CONFIG_LPC option guards both
common code to eSPI and LPC and LPC-only code. Going forward
CONFIG_HOSTCMD_LPC will guard only LPC code, and a new option
CONFIG_HOSTCMD_X86 will guard common code to both LPC and eSPI.

I am leaving the CONFIG_LPC and CONFIG_ESPI defines in this CL so each
CL in the stack compiles.

BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)

Change-Id: I6ae3a805167a3404701d8a53c14dc83299afb376
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067498
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-22 21:56:37 -07:00
scott worley
359f1b582a ec_chip_mchp: Add miscellaneous register defines: LPC and IRQ.
BRANCH=none
BUG=
TEST=Build boards based on chip/mchp.

Change-Id: I792e042cc3d78bf139b2ba4be8c1904e00118d30
Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1053576
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-22 15:54:12 -07:00
Jagadish Krishnamoorthy
2c9c55da93 octopus: implement device mode
To enable device mode, set the gpio USB2_OTG_ID
in the respective boards to high.
Pull the gpio low to disable device mode.

BUG=b:79343083
BRANCH=NONE
TEST=On Yorp board, for UFP mode gpio USB2_OTG_ID should be high,
for DFP mode gpio USB2_OTG_ID should be low.
In OS console, lspci should list xdci.
(with chromiumos/third_party/coreboot/+/1064592)

Change-Id: I70f13a9705626d9bcbe989239f6826d35d8fa536
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1058832
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-22 15:54:11 -07:00
Vadim Bendebury
32b1e3add7 g: speed up CCD UART processing
AP and EC consoles may generate a lot of bursty traffic, and cr50 UART
console to USB processing is very slow: when characters become
available, a hooks task callback is invoked, which retrieves received
characters one at a time and queues them up to the appropriate USB
transmit queue.

This patch speeds up things as follows:

  - increases the seize of USB transmit queues for AP and EC console
    channels to 512 bytes. Experiments supported by code
    instrumentation has shown that even this is not enough to avoid
    underruns, but this is a good compromise between memory use and
    performance, these sizes could be revisited later,

  - raises UART RX interrupt priority from level 1 to 0

  - moving bytes from UART TX FIFO to USB queue happens on the
    interrupt context when UART TX interrupt is asserted

  - as many characters as possible are read from the UART first,
    before queuing function is called, and the entire received batch
    is passed to the queuing function.

    It has to be mentioned here that presently batch processing is not
    necessarily much more efficient, because queuing function becomes
    more complicated when multiple objects are passed to it, this will
    have to be dealt with in a separate patch.

There is still a lot of room for improvement:

   - functions used to queue up data are very generic, dedicated code
     could help a lot.

   - UART drivers should have methods for collecting all bytes
     available in receive FIFO in one invocation,

   - USB side of things (dequeuing data and passing it to the
     controller.

BRANCH=cr50, cr50mp
BUG=b:38448364

TEST=ran 'chargen' application on both AP and EC to flood the console
     channels and observed the flow of characters on the host site, it
     is pretty smooth with occasional hiccups, especially when TPM is
     active, before this patch it was impossible to have both stream
     up, both were garbled.

  -  Verified that new account can be created and user logged in on
     restarts while chargen is running, i.e. TPM task gets enough
     processing bandwidth.

  -  When EC is reset, there seem to be no lost characters on the
     console (it used to cause some garbled console output before this
     patch). The below output was collected on Coral:

  > reboot
  Rebooting!

  --- UART initialized after reboot ---
  [Reset cause: soft]
  [Image: RO, coral_v1.1.8363+2cc945d5a 2018-05-15 17:41:57 ...
  [0.003605 init buttons]
  [0.003826 Inits done]
  [0.004094 tablet mode disabled
  ]
  [0.008272 found batt:SMP]
  [0.022278 SW 0x01]
  [0.042247 hash start 0x00040000 0x00021994]
  [0.045823 Battery FET: reg 0x0018 mask 0x0018 disc 0x0000]
  [0.071136 kblight registered]
  [0.071544 PB init-on]
  [0.071818 USB charge p0 m0]
  [0.073670 ID/SKU ADC 4 = 1309 mV]
  [0.075630 ID/SKU ADC 3 = 852 mV]
  [0.076077 SKU ID: 71]
  [0.076335 Motion Sensor Count = 3]
  [0.083594 PD comm enabled]
  ...

  - did not test bitbang programming mode, it is in line for
    reworking for speeding up as well.

Change-Id: Ic9f3972f585dd1976169965c2a2422253aeac87a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1016037
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2018-05-22 15:54:10 -07:00
Stephen Boyd
0a602bd7b4 ectool: Fix typo in feature listing
The power delivery spelling shouldn't have the extra 'e'. Remove it.

BRANCH=None
BUG=None
TEST=ectool inventory and check for spelling

Change-Id: Ic1ca8b5d15a20c532f5ae8d0404634e0bf93849b
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1057835
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
2018-05-22 15:54:09 -07:00
Stefan Adolfsson
6f15197b06 npcx: CEC: Change input back to GPIO when disabling CEC
The factory tests relies on being able to read CEC_IN through the
GPIO API. When it is configured as TA1, it can't be read as a
GPIO. With this change, the pin will be a reconfigured as a GPIO
at boot or when CEC is runtime disabled using "ectool cec set
enable 0"

Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>

BUG=b:79842676
BRANCH=none
TEST=Test that "ectool cec read" still works with CEC on, and
that "ectool gpioget CEC_IN" reflects the incoming voltage when
CEC is off.

Change-Id: I3b17d6551612a156897d95ea2473e4fbcbd70e39
Reviewed-on: https://chromium-review.googlesource.com/1064110
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-22 15:54:09 -07:00
Stefan Adolfsson
4e26caf25e npcx: CEC: Fix issues with pushing to incoming buffer
When pushing to the circular buffer, the read-offset mutex is no
longer taken, so don't unlock the mutex.

Don't allow writing to the last byte of the buffer. In that case,
the read and write pointers will become equal and the buffer will
be treated as empty.

Add handling for pushing messages of invalid size.

Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>

BUG=b:76467407
BRANCH=none
TEST=Turn on/off TV:
ectool cec write 0x40 0x36
ectool cec write 0x04 0x40
Verify that incoming messages still works when turning off TV:
ectool cec read -- -1

Change-Id: Id207c442fac573430aac0c744ec07fa203074228
Reviewed-on: https://chromium-review.googlesource.com/1068945
Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-22 15:54:06 -07:00
Wai-Hong Tam
8d07542bdf cheza: Enable LED support
It is copied from the Lux board, as the rev-0 hardware uses the same
design as Lux. The LED doesn't work if AP is in G5, as the LED power
source PP5000 is disabled in G5. Will fix it later.

BRANCH=none
BUG=b:74395451
TEST=Tested several scenarios: charge, low-level battery, charge but
no battery.

Change-Id: I3803b917c6c4cba35176b75cb316b2c8ef9eb13a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1060582
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-22 15:54:06 -07:00
Wai-Hong Tam
60b3b245c1 cheza: Check power enough and enable PP5000 when power-on AP
Remove the previous hack of force increasing the adapter current.

The PP5000 rail is now turned on/off during power-on/off AP.

Add a check to ensure it has enough power to enable the 5V rail
and boot AP. If the battery is in low level or unplugged and the
charger adapter doesn't supply enough power, don't boot AP and
transition back to S5. The check may wait a while for PD
negoiation.

BRANCH=none
BUG=b:79353631
TEST=On battery plugged and unplugged cases, checked the device can
source VBUS to USB port-0 and port-1.
TEST=Unplug battery and use a low-power adapter, can't boot up AP.
See the "Not enough power to boot" message and transition to S5.

Change-Id: Ie9b8dff6e10d97dffd554b382595e5e7a70875e6
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1050607
2018-05-22 15:54:05 -07:00
Aseda Aboagye
fc8b1ab52c nocturne: Fix EC hibernate.
This commit adds the appropriate hibernate flags to the hibernate wake
pins.  It additionally, adds a board specific hibernate function which
sets up the PSL pins for wake as well as writing to the ROP PMIC to
disable all the power rails.

BUG=b:79713379
BRANCH=poppy
TEST=Enter `hibernate` on EC console, verify that system can wake from
AC insertion, power button press, and lid switch.

Change-Id: I5b197c3c4d54cfc9c0b00c19815faa019f8b8cae
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1067892
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
2018-05-22 15:54:05 -07:00
Aseda Aboagye
ad8a612321 npcx7: Export entering PSL mode.
Some boards (like nocturne) use PSL mode, but the deassertion of PSL_OUT
does not directly cut the EC's VCC1 rail.  Therefore, the board needs to
implement a board specific implementation of hibernate while also being
able to configure PSL mode.  This commit exports a function of entering
PSL mode which could be used in a board specific hibernate
implementation.

BUG=b:79713379
BRANCH=poppy
TEST=`make -j buildall`

Change-Id: I8debcae5e713b85c6d23ee3419416b6ae5d5dbf0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1067891
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2018-05-22 15:54:04 -07:00
CHLin
a2a1f66cb5 util: improve uartupdatetool (UUT) mechanism
The original UUT mechanism has the limitation that the image size cannot
exceed the code RAM size. Hence, it only allows to flash the EC firmware
by programming RO and RW images seperately.

In this CL, we introduce the "--auto" flag in uartupdattool.
It will divide the firmware into segments (4K bytes) and program
the segments one by one.
It also simplifies the function flash_npcx_uut() in flash_ec because
some actions are moved into the uartupdatetool with auto flag enabled.

BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=
------------------------------------------------------------------------
1. Connect the servo connector (J24) on npcx7 EVB to servo board v2 via
flex cable.
2. Manually turn the switch SW1.6 to "ON" on npcx7 EVB.
3. Reset ec by issuing Power-Up or VCC1_RST reset.
4. Manually turn the switch SW1.6 to "OFF" on npcx7 EVB.
5. Move npcx7_evb from array BOARDS_NPCX_7M7X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. "./util/flash_ec --board=npcx7_evb" or
   "./util/flash_ec --board=npcx7_evb --ro"
(Note: this line in flash_ec must be removed in step 6:
https://chromium.googlesource.com/chromiumos/platform/ec/+/master/util/flash_ec#961)

Change-Id: Ifdb6a40ef88c6a9fb435169e158fd615100237cf
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1043825
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-05-22 12:56:26 -07:00
Dino Li
3423505535 it83xx: watchdog: print LP on watchdog warning
It's difficult to debug problems with single watchdog warning.
This patch will print IPC and LP registers continually if watchdog
warning is fired.

BRANCH=None
BUG=b:79733639
TEST=waitms 1000, EC print warning message but no reset.
waitms 3000, EC print warning message and then reset.

On bip, EC is powered by servo only. And we got the following
watchdog warning message:
And we refer to assembly code, the IPC indicates CPU is executing
instructions in "gpio_get_level()"
(IPC:00002408, IPC:00002404, IPC:000023fc, IPC:0000240e),
and calling from "chipset_pre_init_callback()" (LP:0000101e).

Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e
Pre-WDT warning! IPC:00002404 LP:0000101e
Pre-WDT warning! IPC:000023fc LP:0000101e
Pre-WDT warning! IPC:0000240e LP:0000101e
Pre-WDT warning! IPC:00002408 LP:0000101e

Change-Id: I9e9429806db448624a10c348bee9c6e3d0a7765b
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1060937
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-22 09:49:33 -07:00
Ryan Zhang
efcd71e075 Nami: support KB backlight for Akali
BUG=b:79898204
BRANCH=master
TEST=ec console.`kblight 0` and see KB backlight off
     ec console.`kblight 100` and see KB backlight on

Change-Id: Ibd79426a71e334b707d81e9b53d7857c5401b49a
Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1063694
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2018-05-22 00:21:35 -07:00
Dino Li
39767b55b4 tcpm: it83xx: Output error message if enabling an unsupported configuration
This patch will output an error message during compiling if we
try to enable an unsupported config option for it83xx PD driver.
This avoids the issue of an unknown EC reset caused by calling
function at address 0x00000000.

This change also remove empty definitions.

BUG=b:79700229,b:79706847,b:79637786
BRANCH=none
TEST=make buildall -j

Change-Id: I08accb88ae7c6d574dfcd115a5122acd2dfe46b4
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1059095
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-22 00:21:28 -07:00
Nick Sanders
c20a6da054 servo_updater: add reboot flag
This allows a reboot request regardless of whether update
is required.

BRANCH=servo
BUG=b:69016505
TEST=servo reboots

Change-Id: I2e8651e6ffa95c622aa0a8122d705d9ac8fbdd82
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066988
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-21 21:18:04 -07:00
Jett Rink
70091bf0f7 ite_flash: handle termination signal gracefully
Since we wait indefinitely for the ITE chip to be ready
when we are flashing it, we need to be able to handle the
console terminal signal gracefully so the host USB ports do
not get in a bad state.

BRANCH=none
BUG=none
TEST=Can exit while loop gracefully

Change-Id: Ica8e7c6c707cd58bdaa754be76fffef418d870e4
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067788
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-05-21 21:18:02 -07:00
Vadim Bendebury
338c594ce3 cr50: prepare to release version 0.4.7
BRANCH=none
BUG=none
TEST=none

Change-Id: I3c5516f8c8b3119ae705308eba3068ba5bf4d7e7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067780
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2018-05-21 21:18:01 -07:00
Nick Sanders
677207d5f0 servo_updater: allow local builds
Updater regex allows local build versions as well.

BRANCH=None
BUG=b:69016431
TEST=update servo v4

Change-Id: I203aefff998ef5c69434187830c27431dbcc7dee
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066989
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-21 21:17:59 -07:00
Caveh Jalali
c1f1c4c282 atlas: keep discharged battery powered during precharge
when we wake up a discharged battery using the "precharge current", it
briefly requests requests (0 vols, 0 amps) - presumably while its
controller is trying to figure out what's going on...  we respect this
and stop charging, but that's probably a really bad idea since the
battery has had very little chance to accept enough charge to
self-power its controller.  enabling "REQUESTS_NIL_WHEN_DEAD" gets
around that.

BUG=b:79354967
BRANCH=none
TEST=instrumented code to verify we override the 0 amps request when
battery is at 0% charge

Change-Id: I1e15e5106ae5cdda94bd1bfd02132b300c9c4665
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067010
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2018-05-21 21:17:52 -07:00
Caveh Jalali
2eb29bb25f atlas: ignore unavailable battery temp readings
the battery temperature field is only valid after we've actually
managed to read the battery temperatore parameter.  so, if the temp
field is marked "BAD", don't even look at it.

this addresses a case where we were removing charge current during the
precharge phase - basically removing charge current from a battery
that we're trying to power so we can talk to its I2C controller.

BUG=b:79354967
BRANCH=none
TEST=instrumented code to verify we don't request 0 amps in ST_PRECHARGE

Change-Id: I3b40903506fa949c14ecaf577f134f31cfcf8fb7
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066789
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2018-05-21 21:17:52 -07:00
Jett Rink
a93ed9b9aa it8320: print error message if gpio triggers are misconfigured
If a GPIO interrupt is misconifgured print out a console message.

BRANCH=none
BUG=b:79942824
TEST=verified messages get printed if I try to configure both on GPH6

Change-Id: Ic7156bea7c4fb2ac0bf7d717d8b812a60d5ad16a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066223
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
2018-05-21 21:17:51 -07:00
Jett Rink
5fb2784fc4 bip: fix uart interrupt type to both
ITE only supports both edge triggers for GPB0 instead
of just falling.

BRANCH=none
BUG=79942824
TEST=nothing is changing on how it configured.
We are just changing the documentation in gpio.inc

Change-Id: Ib7af54e360f4acaf410fb64b6747caf4d8729cec
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066310
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21 21:17:51 -07:00
Ruben Rodriguez Buchillon
cb4338e289 sweetberry: expose i2c over usb
Expose the i2c interface through usb so that we can read power rails
through servod leveraging the work being done there.

BRANCH=none
BUG=chromium:806148
TEST=manual testing
- powerlog still works
- i2c over usb using servod code works (other CLs needed)

Change-Id: I48876bc4839509a397ce77376b337c37c556ae40
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1051136
Reviewed-by: Nick Sanders <nsanders@chromium.org>
2018-05-21 18:19:29 -07:00
Daisuke Nojiri
e633c3c7db Nami: Add KX022 as a lid accelerometer for Akali
This patch adds KX022 as a lid accelerometer for Akali. The readings
are adjusted by rotating 180 degree on X-axis and 180 degree on Y-axis.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

BUG=b:77496502
BRANCH=none
TEST=Verified on Akali

Change-Id: I23e8351f457255bdd743b5157053efd8edd6ca4a
Reviewed-on: https://chromium-review.googlesource.com/1038622
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@google.com>
2018-05-21 18:19:27 -07:00
Scott Collyer
1168e4e70f charger: Modify manual mode to save desired current/voltage
Previously manual_mode used the current values of voltage/current to
set the desired values for each charge_request() call. Since manual
mode is entered/exited in the host command task, this can easily lead
to a race condition where the charger gets disabled in the host
command task, the reenabled by the charger task. This in turn makes
the ectool chargecontrol idle command unreliable.

This CL replaces manual mode with two variables, manual_voltage and
manual_current. The default values are -1 which means that they are
inactive. When the ectool command 'chargecontrol idle' is executed, it
sets both variables to 0. This then removes the race condition
possibility as each iteration of the charger loop will use
manual_voltage and/or manual_current if not -1.

BRANCH=coral
BUG=b:68364154
TEST=Manual
Executed 'ectool chargecontrol idle' and 'ectool chargecontrol normal'
numerous times and verified that the charging was disabled/resumed
each time as expected. Without this fix the problem could be
reproduced always in less than 10 attempts, typcially less than
5. With this CL charging is disabled reliably each time and I'm not
able to reproduce the problem.

Change-Id: I1ed9cdb42249cdf72ab34dd95b8f42c09d9a490c
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/851419
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
(cherry picked from commit b7254f38979f274acc66330905399ff5ddf4129b)
Reviewed-on: https://chromium-review.googlesource.com/922069
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2018-05-21 18:19:24 -07:00
Philip Chen
1de987735a scarlet: Enable AP throttling for battery under-voltage
BUG=b:73050145
BRANCH=scarlet
TEST=manually test on scarlet together with CL:1064983

Change-Id: Ic5bcc0e4432b2f8ac03fcfa872388ff07d240a7b
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064985
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-21 18:19:23 -07:00
Philip Chen
453647e21a charge_state_v2: Throttle AP in low battery voltage
When EC sees voltage drops below BAT_LOW_VOLTAGE_THRESH,
we kick off a timer and ask AP to throttle.

When the timer expires which means EC hasn't seen under-voltage
for BAT_UVP_TIMEOUT_US, we ask AP to stop throttling.

We reset the throttling status and do nothing when AP is off (S5).

BUG=b:73050145, chromium:838754
BRANCH=scarlet
TEST=manually test on scarlet, confirm EC sends
EC_HOST_EVENT_THROTTLE_START and EC_HOST_EVENT_THROTTLE_STOP
host events when entering/exiting UVP.

Change-Id: Ia760989f760f95549f7a8a8acb1d01de23feab5a
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064983
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-21 18:19:22 -07:00
Daisuke Nojiri
d818682188 Nami: Erase OCM flash for Akali
This makes Akali EC check OCM flash and erase it if it's not empty
at start-up.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

BUG=b:79985105
BRANCH=none
TEST=Verified OCM flash is erased at start-up on Akali.

Change-Id: If6c09be0a547313b10e4fd45ec4b3719f83abaa9
Reviewed-on: https://chromium-review.googlesource.com/1066932
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21 18:19:20 -07:00
Daisuke Nojiri
04d851d045 anx7447: Timeout when waiting for flash operation completion
This makes anx7447 driver timeout if it waits for flash operation
completion more than 100ms.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

BUG=b:79985105
BRANCH=none
TEST=Run anx_ocm erase on Nami

Change-Id: I1fa722aa532bd8d07dd191ad45e793f70a3b0742
Reviewed-on: https://chromium-review.googlesource.com/1066931
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21 18:19:20 -07:00
raymondchou
52e2bdf4ab Nami: Enable CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
When any of battery cells are near the Cell Under Voltage, battery
enters shutdown mode. However, battery cells can continue to discharge
due to self discharge. Battery cell vendor defines the minimum
acceptable cell voltage. If the cell voltage falls below that value,
battery BMS does not close the C-FET and the battery is considered
permanently dead.

So, every time battery enters shutdown mode, the BMS executes SUV
status check to see whether cells are in safe range to charge.

Gauge IC turns on C-fet after a 5 sec delay. During this delay, the
gauge requests 0mA charging current and 0V charging voltage.

During SUV check, battery gauge monitors the external voltage by the
charger through "battery present through" setting.
If the external voltage is less than the threshold, the BMS goes to
shutdown mode again and this repeats.

This patch enables CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD so that the
EC will supply voltage & current even if the battery requests 0V, 0A
at 0% soc, which only happens when the BMS is exiting shutdown mode.

Battery gauge IC: TI BQ40Z50
Battery gauge FW version: 1.06 for BYD/ 1.07 for LG and Simplo.

BUG=b:73921750
BRANCH=none
TEST=Check dead battery can be charged battery to normal mode.

Change-Id: Ib7e12a0596d53377c58eb17c980cd7e01576de7c
Signed-off-by: raymondchou <raymond_chou@compal.corp-partner.google.com>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/910608
Commit-Ready: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
2018-05-19 06:47:19 -07:00
Mulin Chao
f8b3347ce7 npcx: lpc: Remove FW_OBF bypass for npcx7 and later npcx ec series.
In CL 419909, we add a bypass for FW_OBF bug in npcx5 series. (In
npcx5, setting FW_OBF won't de-assert IRQ1. The bypass emulates a host
read through sib to clear OBF bits in HIKMST and STATUS registers and
de-assert IRQ1.) This bug was already fixed in npcx7 series and later
npcx. This CL restores original mechanism to clear keyboard buffer by
setting FW_OBF bit if chip series is not npcx5.

BRANCH=none
BUG=chrome-os-partner:34346
TEST=No build errors for npcx series. Run the following script "while
true; do ./keypress_emulate_enter_reboot.sh ; sleep 25; done" on grunt
over two days and no symptom occurred.

Here is the content of keypress_emulate_enter_reboot.sh
"#!/bin/bash
TIME="0.5"
DEV=/dev/pts/26
echo "kbpress 11 4 1" > ${DEV}
echo "kbpress 11 4 0" > ${DEV}
echo "kbpress 0 2 1" > ${DEV}
echo "kbpress 10 6 1" > ${DEV}
echo "kbpress 2 3 1" > ${DEV}
echo "kbpress 2 3 0" > ${DEV}
echo "kbpress 10 6 0" > ${DEV}
echo "kbpress 0 2 0" > ${DEV}
sleep 2 # Emulate "Ctrl+Alt+F2"

echo "kbpress 3 7 1" > ${DEV}
echo "kbpress 3 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 9 7 1" > ${DEV}
echo "kbpress 9 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 9 7 1" > ${DEV}
echo "kbpress 9 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 3 2 1" > ${DEV}
echo "kbpress 3 2 0" > ${DEV}
sleep ${TIME}
echo "kbpress 11 4 1" > ${DEV}
echo "kbpress 11 4 0" > ${DEV}
sleep 2 # Emulate "root"

echo "kbpress 3 7 1" > ${DEV}
echo "kbpress 3 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 2 7 1" > ${DEV}
echo "kbpress 2 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 3 0 1" > ${DEV}
echo "kbpress 3 0 0" > ${DEV}
sleep ${TIME}
echo "kbpress 9 7 1" > ${DEV}
echo "kbpress 9 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 9 7 1" > ${DEV}
echo "kbpress 9 7 0" > ${DEV}
sleep ${TIME}
echo "kbpress 3 2 1" > ${DEV}
echo "kbpress 3 2 0" > ${DEV}
sleep ${TIME}
echo "kbpress 11 4 1" > ${DEV}
echo "kbpress 11 4 0" > ${DEV}
sleep 1 # Emulate "reboot""

Change-Id: I9ca11c92c5abb909e2d3f22018cf962e1292f406
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1059984
Reviewed-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-18 23:07:34 -07:00
Daisuke Nojiri
d38b4fcc77 Nami: Suppress logging for less informative host commands
This patch suppresses logging for EC_CMD_CONSOLE_SNAPSHOT,
EC_CMD_CONSOLE_READ, EC_CMD_PD_GET_LOG_ENTRY, EC_CMD_MOTION_SENSE_CMD.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

BUG=none
BRANCH=none
TEST=make BOARD=nami

Change-Id: I25d343b4828c0336b1b221041561d2416326948b
Reviewed-on: https://chromium-review.googlesource.com/1066692
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-18 23:07:32 -07:00
Mary Ruthven
12b71fcbb0 cr50: include sleepmask in all images
sleepmask is really useful for debugging sleep issues. Add a read only
version of sleepmask to non-DBG images. It will only be accessible once
the console is unlocked.

BUG=none
BRANCH=cr50
TEST=make sure sleepmask can be modified in DBG images and can only be
read in prod images.

Change-Id: I31ef966f6302d4a7602a014cb08c9b972d13f41e
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1062804
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2018-05-18 20:08:43 -07:00
Jett Rink
f5d9109524 power: prevent chipset startup if no battery or ac
When the EC is powered solely by the servo, we do not want to try to
start the AP. If we do, we will watchdog reset in a while loop waiting
for the 3300 and 5000 rails to come up (which won't come up if powering
only on the servo)

BRANCH=none
BUG=b:79606767
TEST=powering bip with servo only does not watchdog reset boot loop

Change-Id: I132312f7f08201dc58d797900df16502240ee98c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1062502
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
2018-05-18 20:08:36 -07:00
Jett Rink
5551befe2a octopus: enable trackpad (S3+) and backlight (S0)
Enable trackpad when entering S3, and display backlight when entering S0
and disable them on the opposite transition. Moving common code to
baseboard.

BRANCH=none
BUG=b:79900266
TEST=bip trackpad works in S3 as wake source. backlight turns off in
S0ix and S3.

Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1064693
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2018-05-18 20:08:26 -07:00
scott worley
04fbcdb20f ec_chip_mchp: Remove debug trace statements
Trace statements no longer needed.

BRANCH=none
BUG=
TEST=Build boards based on chip mchp.

Change-Id: I0f687fce46cd81d132d546e5ae011863e115e1e7
Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1053834
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-18 20:08:22 -07:00
Divya Sasidharan
f736ed2e60 yorp: Add battery temperature sensor
BUG=b:79940719
BRANCH=None
TEST=On yorp: Test if ectool tempsinfo all lists
     battery sensor.

Change-Id: Ib70872cc8f91d322120714a9147dbdd8e40432aa
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1060577
Commit-Ready: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-18 20:08:18 -07:00
Randall Spangler
3c6894cacc cr50: Add check for developer mode
This will be used as part of the checks for when to allow CCD open.

Add check for firmware space dev mode bit, based on the similar code
which reads the FWMP.  Print the state of both bits in 'ccd get'.

BUG=b:79983505
BRANCH=cr50
TEST=With dev mode off, 'ccd get' does not report TPM: dev_mode.
     Turn on dev mode via the recovery screen, and it does.

Change-Id: I6af78bb104004323cd377ed996e1db94bc36fc62
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1066391
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2018-05-18 20:08:18 -07:00
scott worley
a91ca60215 flash: Fix offset bug in spi_flash_read
Observed VBOOT hash failure for EC_RW. Function
spi_flash_read with size > SPI_FLASH_MAX_READ_LEN
is incorrectly incrementing the offset. For example:
0, 0x100, 0x300, 0x600, all with read size = 256.

BUG=
BRANCH=any EC using SPI flash
TEST=Trigger VBOOT hash re-calculation using EC
console hash rw command. Second test program
SPI flash with known test pattern longer than
SPI_FLASH_MAX_READ_LEN and read using EC
console flashread.

Change-Id: I5fda47f132f64b12044b94663a19d889f1c2b32a
Reviewed-on: https://chromium-review.googlesource.com/1036258
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2018-05-18 20:08:16 -07:00
Scott Collyer
23947f1d3b octopus: Display battery FET console message only when disconnected
With CONFIG_BATTERY_REVIVE_DISCONNECT once the battery FULL flag gets
set, charge_state_v2 will call battery_get_disconnect_state. That
function had console print that's only meaningful when the battery is
actually disconnected. To avoid flooding the EC console log under this
expected condition, this CL moves the console log so that it only
happens when the battery is present, but disconnected.

BRANCH=none
BUG=b:79133101
TEST=Verfied that with full battery the console log message is no
longer showing. Also verifed that can recover from battery cutoff
condition.

Change-Id: Id2e161cbd52c0ef07f28b94608f9615071327c97
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064975
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
2018-05-18 14:33:19 -07:00
Patrick Georgi
013494ad18 chip/npcx: ensure proper type of cec_task
gcc 8.1 in lto mode checks that the prototypes match.

Change-Id: Id7eb5bd724e1084058a5c959e909a797659051b8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1062026
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
2018-05-18 10:05:14 -07:00
Patrick Georgi
880bb8b212 util/ecst: refactor path mangling
ecst has two open-coded implementations of a function to inject a string
into another string (that happens to be a path). Factor out and make
sure that gcc 8.1's static analysis of string lengths is happy.

BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1

Change-Id: I80581d26b6f75cac2c9530c18f94d12614aa1586
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061878
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
2018-05-18 10:05:13 -07:00
Patrick Georgi
85ddb2ce53 Shuffle const around
gcc 8.1 complains about duplicate const, and while some of these really
are duplicate, others look like they were supposed to tighten the API
contract so that variables are "const pointer to const data", but didn't
have that effect.

BUG=b:65441143
BRANCH=none
TEST=building Chrome EC as part of upstream coreboot's build with a
gcc 8.1 compiler now works (better. there are other issues left)

Change-Id: I6016c5f282516471746f08d5714ea07ebdd10331
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1039812
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-05-18 10:05:13 -07:00
Patrick Georgi
e5f3ee270a Tell linker about the arch and CPU it's linking for
GCC 8.1's linker tries to rewrite the code to match the lowest common
denominator, reintroducing references to __aeabi_idivmod and friends
even on ARM revisions that don't need them.

Tell it what it's linking for to keep it harmless.

BUG=b:65441143
BRANCH=none
TEST=make buildall works with gcc 8.1

Change-Id: I7296aa80f587aa4f004fb20958714766793ab2b5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061693
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
2018-05-18 10:05:12 -07:00
Caveh Jalali
030d643efe atlas: add pullups to TCPC interrupt pins
there are no pullup resistors on the TCPC ALERT# pins and none on the
board, so we need to turn on internal pullups on the EC side.

BUG=b:75070158
BRANCH=none
TEST=board still boots

Change-Id: I15a7940d8b647b83c6ae304171c4a7c46b920529
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1059870
Commit-Ready: caveh jalali <caveh@chromium.org>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
2018-05-18 05:32:37 -07:00
Philip Chen
4daa90d7b4 charge_state_v2: Localize a static variable
BUG=none
BRANCH=scarlet
TEST=build scarlet

Change-Id: Idf70d5eb3905edf86ea14e1288ae1a42876bd35c
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1064982
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2018-05-18 05:32:36 -07:00
Allen Webb
37da6535eb Cr50: Dcrypto: calculate appkey digests at runtime to save space.
Before:
*** 4560 bytes still available in flash ****
After:
*** 4696 bytes still available in flash ****

BRANCH=none
BUG=b:65253310
TEST=Update Cr50 with this image and verify the keys are the same.

Change-Id: I1c722ced185c41f732ce0ed5236db01401f21dfc
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1031058
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2018-05-17 22:21:08 -07:00
Jett Rink
0579bf584c bq25703: correct define names
The register values used BQ25793 as the prefix and they should
use BQ25703 instead

BRANCH=none
BUG=none
TEST=none

Change-Id: I1955ff075c4e95ed901a5f265340ee01d60e1739
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1060590
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
2018-05-17 19:35:00 -07:00
Raymond Chou
da9d652117 Nami: Allow ectool to control LEDs
This patch makes led_get_brightness_range return amber=100, white=100
regardless of OEM ID or led_id. This function is for ectool led command,
which is used to test basic LED connectivity.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>

BUG=b:78489297,b:77827579
BRANCH=none
TEST=Run
1. ectool led battery white=100
2. ectool led battery amber=100
3. ectool led power white=100
4. ectool led power amber=100

Change-Id: I6c6b3a5dd26aaba3a3ff7dccd6e116794c6594c9
Reviewed-on: https://chromium-review.googlesource.com/1062077
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2018-05-17 19:35:00 -07:00