Let's split the usb headers in 3 different parts, instead of having
usb_descriptor.h pull in usb_hw.h and usb_api.h.
- usb_api.h: EC functions related to usb (e.g. connect/disconnect)
- usb_descriptor.h: common USB names and structures
- usb_hw.h: Functions required for interactive with EC's USB HW
BRANCH=none
BUG=b:35587171
TEST=make buildall -j
Change-Id: I37ead61e3be5e7ae464f1c9137cf02eaab0ff92e
Reviewed-on: https://chromium-review.googlesource.com/454861
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
usbpd1 futility image type is deprecated and should not be used for
new designs. This adds proper support for rwsig image type.
Key and signatures are added at linker stage step (futility cannot
directly create such signed images). Thanks to VB21 header, rwsig.c
can now tell how many bytes of the RW image need to be
cryptographically verified, and ensure that the rest is blank (0xff).
BRANCH=none
BUG=chromium:690773
TEST=make BOARD=hammer; flash, RW image is verified correctly.
TEST=make runtests -j
TEST=For the rest of the tests:
Change config option to CONFIG_RWSIG_TYPE_RWSIG
TEST=make BOARD=hammer; flash, hammer still verifies correctly.
TEST=cp build/hammer/ec.RW.bin build/hammer/ec.RW.bin.orig;
futility sign --type rwsig --prikey build/hammer/key.vbprik2 \
build/hammer/ec.RW.bin
diff build/hammer/ec.RW.bin build/hammer/ec.RW.bin.orig
=> Same file
TEST=Add CONFIG_CMD_FLASH, flashwrite 0x1e000, reboot, EC does
not verify anymore.
TEST=dump_fmap build/hammer/ec.bin shows KEY_RO and SIG_RW at
correct locations.
Change-Id: I50ec828284c2d1eca67fa8cbddaf6f3b06606c82
Reviewed-on: https://chromium-review.googlesource.com/441546
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Servo_v4 requires the ability to have a different default state per
port. In previous devices, the assumption was that each supported port
had the same default usb pd state and power role. This CL moves the
by the default power role which in turn is derived from
CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now
uses 'port' as argument so it can be port specific if required.
PD_DEFAULT_STATE was a board.h specific config, but in practice each
instance used to date was set to PD_STATE_SNK_DISCONNECTED if
CONFIG_USB_PD_DUAL_ROLE was defined and set to
PD_STATE_SRC_DISCONNECTED otherwise.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual run 'make -j buildall' to verify that all instances of
PD_DEFAULT_STATE were removed.
Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431787
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This feature is inconsistent. Not all boards have such a symlink
(for a obvious reason).
This feature is fragile. It's most likely not tested and going to be
broken if not already. Developers won't like it if they have to test
two different ways to build boards before submitting patches.
This feature is not necessary. If you build EC in the standard way
(e.g. make BOARD=samus), these symlinks are not needed.
This feature is wasteful. Extra disk spaces are used and extra lines
are added to Makefile (increasing code complexity slightly).
BUG=chromium:626776
BRANCH=none
TEST=make buildall
Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359321
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent:
- When operating as a TCPC, it indicated that the VBUS level should be
tracked (through GPIO inputs) and sent to the external TCPM when
appropriate.
- When operating as a TCPM, it indicated that the VBUS level should be
obtained by querying the TCPC.
These two independent uses have been split into
CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which
sould be more clear.
In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for
other means of VBUS detection.
BUG=chromium:616580
BRANCH=None
TEST=Verify kevin continues to boot + charge.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923
Reviewed-on: https://chromium-review.googlesource.com/348950
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Previously calls to hook_call_deferred were passed the function to call,
which was then looked up in the .rodata.deferred section with a linear
search. This linear search can be replaced with a subtract by passing
the pointer to the deferred_data object created when DECLARE_DEFERRED
was invoked.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
CQ-DEPEND=CL:*255812
TEST=make buildall -j
Change-Id: I951dd1541302875b102dd086154cf05591694440
Reviewed-on: https://chromium-review.googlesource.com/334315
Commit-Ready: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
With commit e9883124ff, a GPIO_INT macro was added. That change
also required that all instances of GPIO_INT in a board's
gpio.inc file come before any GPIO macros, or the interrupt
handler wouldn't work properly.
This CL just adds a warning comment about requirement to all
gpio.inc files.
BUG=chromium:471331
BRANCH=none
TEST=make buildall, test image on Cr50
This is a change to comments only. There is no new behavior to
verify, although I did run try out one new image just to be sure
nothing stupid happened.
Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329334
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Remove duplicate code for checking request message, but keep
a board specific check of the request message for custom checks
needed on zinger and plankton.
BUG=chrome-os-partner:42490
BRANCH=none
TEST=make -j buildall. run on samus and connect a hoho, make
sure we successfully negotiate a contract.
Change-Id: I7398953a158d340e3e113f5a816b55445a857711
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305374
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Set USB communications capable flag in source/sink
capabilities PDO on boards that support USB. This
signals to other side that we are capable of
communication over D+/D- or SS Tx/Rx.
BUG=chrome-os-partner:34982
BRANCH=samus,smaug
TEST=load on samus, use twinkie to sniff traffic,
verify that USB comms capable bit is set in source
cap packet
Change-Id: I0f49cf19eb141512298c3439a4708c53101d674f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300637
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The in_stream and out_stream interfaces were a first attempt
at providing an abstraction for multiple stream like devices
(usart, USB, I2C/LPC host interfaces...). But, by baking
the queue into the device it proved to be hard to use and
required additional resources (task or deferred hook) to handle
passing data from one stream to another.
Since then the queue policy and producer/consumer interfaces
have replaced the stream interfaces. This CL removes the old
stream interfaces and updates the only users (deleting the
test echo code from the discovery-stm32f072 board and updating
the mcdp28x0 driver to use the queue interfaces).
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic0d2abf81eafc4fb2e61172540151f2d0ba45caf
Reviewed-on: https://chromium-review.googlesource.com/276163
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Firmware's original get_info command always returns the same values
for family, chipid, irom & fw despite indeed having different
versions.
Currently its:
family:000e chipid:0001 irom:1.0.0 fw:0.0.0
As we have a new stepping of the chip ('BB') and a corresponding new
firmware (>=0.74) we need a mechanism to verify and log this change.
CL uses the newly hatched appstest command (0x12) message 0x28 to
surface information that properly reflects both hardware and firmware
running.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35939
TEST=manual,
For devices running 0.54 | 0.74 fw see gpio MCDP_READY asserted.
With CONFIG_CMD_MCDP in board/hoho/board.h see the following responses
when executing 'mcdp info'
Stepping | FW | Response
--------------------------------------------------------------------
'BA' 0.53 fails as expected
'BA' 0.54 family:0010 chipid:2850 irom:2.0.0 fw:0.54.0
'BB' 0.73 fails as expected
'BB' 0.74 family:0010 chipid:2850 irom:2.1.0 fw:0.74.0
Change-Id: I2c36393a298c617f903389dab24da631b60ec574
Reviewed-on: https://chromium-review.googlesource.com/274049
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Change refines HPD debounce values into both upstream and downstream
values for packetizing across the type-C link.
For LVL, the upstream type-C device will packetize any HPD transition
>=2ms as either HIGH or LOW. On the downstream side the value is
driven immediately. Additional debouncing should be done by true
upstream device according to specification.
For IRQ, the upstream type-C device will packetize any HPD pulse
>250usec as an IRQ. On the downstream side it will be de-packetized
to create 750usec pulse.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:39717
TEST=samus|macbook(2015) + hoho|dingdong|apple HDMI type-C dongles
still drive screens successfully.
Change-Id: Ide58f3b2d675a82c12ca6afc2be53ca6e2561ace
Reviewed-on: https://chromium-review.googlesource.com/273867
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Move parts of usb_pd_config.h that are not part of the phy layer
out of usb_pd_config.h and into board.h. This cleans up the
division between the TCPC and TCPM as only the TCPC needs to
use usb_pd_config.h.
Also cleans up the use of the CC detection voltage thresholds
by creating standard macros to use based on Rp strength for the
board.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270337
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add config options for various parts of USB PD stack:
CONFIG_USB_POWER_DELIVERY: The use of this option has changed
slightly. It now represents whether or not to include the USB
PD protocol and policy layers of the software stack.
CONFIG_USB_PD_TCPC: Compile in type-C port controller module
which performs the phy layer of the PD stack.
CONFIG_USB_PD_TCPM_STUB and CONFIG_USB_PD_TCPM_TCPCI: If
CONFIG_USB_POWER_DELIVERY is defined, then one TCPM needs to
be defined to declare which port management module to use
to drive the TCPC.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I41aa65a478e36925745cd37a6707f242c0dfbf91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270171
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In the gpio_info struct, we had a irq_handler pointer defined even
though a majority of the GPIOs did not have irq handlers associated. By
removing the irq_handler pointer out of the struct, we can save some
space with some targets saving more than others. (For example, ~260
bytes for samus_pd).
This change also brings about a new define:
GPIO_INT(name, port, pin, flags, signal)
And the existing GPIO macro has had the signal parameter removed since
they were just NULL.
GPIO(name, port, pin, flags)
In each of the gpio.inc files, all the GPIOs with irq handlers must be
defined at the top of the file. This is because their enum values from
gpio_signal are used as the index to the gpio_irq_handlers table.
BUG=chromium:471331
BRANCH=none
TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power
button, keyboard, charging, all still working.
TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build
fail.
TEST=make -j BOARD=peppy tests
TEST=make -j BOARD=auron tests
TEST=make -j BOARD=link tests
Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/263973
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Treat externally powered dualrole devices as dedicated chargers.
This allows us to default to consuming power from externally powered
dualrole devices and cancels a charger override when one is attached.
BUG=chrome-os-partner:38785
BRANCH=samus
TEST=tested with third-party dualrole device that can be externally
powered.
also tested with another samus that was hard-coded with externally
powered bit set, and deleted it's policy for power swapping. when
this externally-powered samus is plugged into a samus running this CL,
we always charge from the externally-powered samus.
Change-Id: I850eba668e86d311d9353aa3881fc3a518409630
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/263331
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Refactoring effort to unify the set of PD intialization tasks that
need to occur. Those areas include:
1. host mode as it relates to power & pull-ups/downs
2. PD tx init
3. PD mux settings
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:36481
TEST=manual,
1. compiles and functions on samus_pd
2. If sysjump w/ dongle connected than alternate mode re-entered
properly including muxing and HPD
Change-Id: I47f32acaeccbd7745e1e01a8b085b1804c4c5000
Reviewed-on: https://chromium-review.googlesource.com/249273
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Current simplified implementation allows single mode entry. Specification
allows multiple mode entry and its advantageous for things like flashing RW
while staying in DisplayPort mode on video dongles.
CL adds capability on DFP to track as many alternate modes as supported by the
DFP. Initial mode entered is still the default supported mode ( 1st entry, 1st
opos). Policy manager can then use host command, EC_CMD_USB_PD_SET_AMODE, to
enter additional supported modes.
On the UFP (hoho, dingdong) a small modification to track multiple svid mode
entries was made.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33946
TEST=manual, On hoho
1. Still successfully enter default mode DP
2. Using ectool's pdsetmode can successfully enter/exit multiple modes.
For example,
# port:1 svid:18d1 opos:1 cmd:1==enter
ectool --name cros_pd pdsetmode 1 0x18d1 1 1
Checking with pdgetmode shows both modes entered.
3. Works across hard & soft resets
4. Can flash via ectool --name cros_pd flashpd 4 <port> <RW image>
5. Still drives external display. With bootarg drm.debug=0x6 and following
command: 'tail -f /var/log/messages | grep "Received HPD" &'
I see HPD assert & deassert when switching between GFU and DP mode.
If both modes entered screen stays lit (after reboot) during write.
Change-Id: I7a21ebea377402eb1b0a0cf1d29df59694e301b1
Reviewed-on: https://chromium-review.googlesource.com/241790
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
If UFP fails to enter mode after tAMETimeout, UFPs should advertise
there USB Billboard class. If at a later time, DFP does successfully
enter a mode the USB device should disconnect permanently.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33968
TEST=manual,
Change UFPs response to 'discover identity' to be busy until after
tAMETimeout and see hoho enumerate (18d1:5010). Then see it
disconnect after DisplayPort mode is entered.
Change-Id: I2d72ed968302fbf74e70f76891a758c47f3773b4
Reviewed-on: https://chromium-review.googlesource.com/242148
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
Separate macros for defining delays to turn on and off VBUS on the
Raiden ports.
Tune the delays for Samus to provide extra headroom based off of
measured worst case times.
BUG=chrome-os-partner:34525
BRANCH=samus
TEST=load onto samus. connect two samus' and use twinkie to analyze
time between request and PS_RDY on connect and then on a power swap.
Change-Id: I65cec911e34c22a4aad136423362a3a65bc2ab2a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241761
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Do not request a voltage that is within the deadband where we
aren't sure if the boost or the boost bypass is on.
BUG=chrome-os-partner:34938
BRANCH=samus
TEST=test on samus with zinger. change the deadband to [10V, 20V]
and see that we only negotiate to 5V. change the deadband to
[13V, 20V] and see that we negotiate to 12V. change the deadband
to [10V, 13V] and see that we negotiate to 20V.
Change-Id: Id761aef35eeadfa2ab7d2ca31a48d4324625ab32
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/241528
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a FIFO to log important events on the PD MCU and coming from the PD
accessories.
The retrieval of the accessories log from the accessories by the PD MCU
is not implemented yet.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:32785
TEST=execute "ectool --name=cros_pd pdlog"
before and after plugging Zinger charger.
Change-Id: If96d73e711ff6ad64cfb99bd3e4d2d8f2643f19a
Reviewed-on: https://chromium-review.googlesource.com/238854
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Implement the new type-C connect state machine which removes
lock and hold times and adds a debounce time to make sure
CC lines settle before going into the attached state.
This also adds detection of accessories, but doesn't do anything
when an accessory is detected.
BUG=chrome-os-partner:33680
BRANCH=samus
TEST=test samus connected zinger and samus connected to samus. make
sure that the connection is always formed. also tested with a third
party with old state machine implementation and formed a connection
every time.
Change-Id: I91a7a6031bc35082cc19d7697142e4aa92ef46f2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
These USB type-C accessories don't have a write-protect GPIO.
Add a configure flag (CONFIG_WP_ALWAYS) to force the flash
write-protection on the dongles.
Also set the read protection (by elevating RDP to level 1),
so trying to unprotect the flash will trigger a full erase.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35088
TEST=boot Hoho,
check the flash OBR and WRPR registers:
"rw 0x4002201c" / "rw 0x40022020"
and the option bytes write-protect bits: "rw 0x1FFFF808"
dump the logical state with "flashinfo" command.
> rw 0x4002201c
read 0x40022020 = 0xffff0002
> rw 0x40022020
read 0x40022020 = 0xffff0000
> rw 0x1FFFF808
read 0x1ffff808 = 0xff00ff00
> flashinfo
Physical: 128 KB
Usable: 128 KB
Write: 2 B (ideal 2 B)
Erase: 2048 B (to 1-bits)
Protect: 4096 B
Flags: wp_gpio_asserted ro_at_boot ro_now
Protected now:
YYYYYYYY YYYYYYYY ........ ........
Change-Id: I45bbc0bce40ecc174b6b8a1ebacf4f53d2fd372d
Reviewed-on: https://chromium-review.googlesource.com/238893
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
For samus, on PD connection or on resume to S0, if we are a sink,
and the other side supports PR_SWAP, then attempt a power swap.
This adds callback functions into board policy file to check
and issue power or data swaps if required by the product.
BUG=chrome-os-partner:31195
BRANCH=samus
TEST=connect samus to zinger and make sure zinger always ends up
as SRC-UFP.
connect samus to samus with both in S0 and see that
they swap power roles once and not data roles.
connect one samus in S0 to one samus in S5 and see that the one
in S5 is sink. then when you boot the one in S5 it switches to a
source.
connect samus to samus with both in S0. do chgoverride 1 on one
side to start charging from the other samus. then on the same
side, turn off the machine (S5) and resume (S0), and see that it
is still charging from the other samus (ie has not switched roles
to source).
Change-Id: Ifab2465fccef77448ac4771a3c2de1c867cbbec4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/238302
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add initial serial driver for mdcp2850 dp->hdmi converter. Driver
implements 'get information' (cmd:0x40) to provide rudimentary method
to test mcdp for functionality and assert GPIO if successful.
Future CLs may expose more serial functionality if necessary.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34122
TEST=manual, when compiles with #define MCDP_DEBUG see successful
serial communication and result from get info.
buf:[00]0x04 [01]0x40 [02]0x00 [03]0xbc
...
buf:[00]0x0f [01]0x40 [02]0x00 [03]0x0e
[04]0x00 [05]0x01 [06]0x01 [07]0x00
[08]0x00 [09]0x00 [10]0x00 [11]0x00
[12]0x00 [13]0x00
family:000e chipid:0001 irom:1.0.0 fw:0.0.0
Change-Id: I35f9d9b0437633d1bd6a6c9fa14413bedb12f5c2
Reviewed-on: https://chromium-review.googlesource.com/235930
Trybot-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Previously, handle_vdm_requests could dispatch another VDM message
via send_validate_message prior to main task returning to vdm state machine
(pd_vdm_send_state_machine). While it hasn't been problematic to-date it would
make honoring VDM specific timers or PDO priority difficult.
CL changes behavior so that if VDM being handled requires another VDM to be sent
its copied to the one entry queue (queue_vdm) where it will be
serviced upon VDM state machine entry later.
With this simplification, CL expands interlocks between PDO & VDO.
VDOs are only sent when source/sink is in the ready state & no
incoming packet is on the CC line. PDOs aren't sent when the VDM
state machine is busy.
CL also simplifies VDM console output to come only from request handler which
could save a few bytes.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:30645
TEST=manual,
1. dingdong/hoho still enter mode.
2. Can still update fw.
Change-Id: I2fe8643a6975205b2d0f510f4f1baf2d74c1e190
Reviewed-on: https://chromium-review.googlesource.com/235680
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Remove common code across all PD policy layers to select the requested
voltage and build a Request Data Object (RDO).
BUG=none
BRANCH=samus
TEST=Load onto samus and connect zinger. Make sure we request the right
voltage (first 5V, then after initial contract is made, 20V). Make
sure input current limit is set appropriately by checking limit on EC
console using charger command.
Change-Id: Ic6bda5e23b2d7b7d710ffdf085e7fbc1b0c3add9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233673
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
CL to migrate the flashing VDMs from zinger's custom vdm to
common/usb_pd_flash.c such that other updateable type-C devices can
share.
Additionally adds gaskets to call standard runtime flashing facilities
for USB-PD devices using it.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:31192,chrome-os-partner:31193
TEST=manual,
Try following:
1. From samus_pd console w/ zinger in port 1
pd 1 flash version
pd 1 flash reboot
pd 1 flash info
2. From samus linux prompt w/ zinger in port 1
ectool --name cros_pd flashpd 1 1 <zinger RW payload>
Reading 16384 bytes from
/usr/local/zinger_v1.1.2528-d809e42.ec.RW.bin...
Erasing expected RW hash
Rebooting
Erasing RW flash
Writing RW flash
Rebooting PD into new RW
Complete
3. Repeat 1&2 above on hoho & dingdong.
Change-Id: I018055fa9de128f937c57debdc21dea026137bcf
Reviewed-on: https://chromium-review.googlesource.com/231835
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
dingdong/hoho have no capability to measure VBUS which is advantageous
in determining what timeouts to honor. Previously we simply assumed
vbus was on and that made things happy until,
e0c80ac pd: on hard reset go to a hard reset recovery state
which introduced proper handling around sink & source reset recovery.
With VBUS assumed 'on' this leads to short timeouts chosen
(PD_T_SAFE_0V) which in turn causes sink to resend hard resets before
source has had time (PD_T_SRC_RECOVER) to handle request.
This change creates config CONFIG_USB_PD_NO_VBUS_DETECT for devices
without the capability to account for lack of VBUS detect.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:34090
TEST=manual
from samus_pd 'pd 1 flash reboot' is successful
Change-Id: I9ef9b0115c7be6c56c64556d2ce8c296f95c614e
Reviewed-on: https://chromium-review.googlesource.com/233024
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Ensure that the PD source changes the output voltage after
tSnkTransition delay after having sent the ACCEPT message
(rather than before).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:33684
TEST=connect Zinger to a PD power sink and monitor VBUS and CC while
doing a 20V to 5V transition.
Change-Id: If86f59eec67630491f4e8dc13a52015ac2de918a
Reviewed-on: https://chromium-review.googlesource.com/230805
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
The role of hoho & dingdong is UFP, and the corresponding protocol
fields in VDO (vdo_idh) should reflect it.
Fix error in IDH_PTYPE definitions of SVDM Identity Header, it's reversed
Adds more legible names to protocol field constants
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Idac9327bf3e8e9597221654bce80bb311b3304af
Reviewed-on: https://chromium-review.googlesource.com/230657
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Bernard Shyu <bernard_shyu@bizlinktech.com>
Tested-by: Bernard Shyu <bernard_shyu@bizlinktech.com>
Allow policy layer to request a PR or DR swap upon formation of
a power contract. Zinger always asks for a data swap so it can
be a UFP, and Samus asks for a data swap only if it is a UFP to
become a DFP.
BUG=chrome-os-partner:33754, chrome-os-partner:31195
BRANCH=samus
TEST=load onto samus and zinger and make sure they swap roles
upon connect with no collisions
Change-Id: I275c9669549c26f25c58f80845daad8edab11313
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229327
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add support for DR_swap, data role swap command.
BUG=chrome-os-partner:33686, chrome-os-partner:28343
BRANCH=samus
TEST=test with samus and zinger. use "pd 1 swap data" command
and verify data role swaps by using twinkie and "pd 1 state".
Change-Id: I410309199cdeecb26847a6bf217523fdfe688cba
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229192
Previously enabling USB would automatically (using an
init hook) initialize the USB peripheral. This would
take over the GPIO lines assigned to the USB module.
This is not OK on Ryu for Case Closed Debug because it
interferes with the AP's access to the USB 2.0 lines
even when not in Case Close Debug mode.
This change adds a configuration option to inhibit this
default initialization of the USB peripheral. It also
renames the existing CONFIG_USB_INHIBIT to
CONFIG_USB_INHIBIT_CONNECT now that there are two
possible inhibitions.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I6734357131b4356e3d4164349d6c74deac196ce5
Reviewed-on: https://chromium-review.googlesource.com/229138
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Once a mode is entered object position (OPOS ... AKA alternate mode) field in
the VDM header should always track that mode.
CL fixes DP status & config messages which did not add the correct OPOS. In
fixing I mapped to the UFPs function pd_alt_mode which for the DFP did require
the addition of port parameter. Finally I cleaned up code to use this function
throughout common policy layer where previously I'd just accessed the pe
structure directly.
BRANCH=samus_pd
BUG=none
TEST=manual, compiles, insert hoho/dingdong into samus and see OPOS=1 from samus
for enter, dp_config, dp_status SVDMs
Change-Id: I66448c3386be01bae58768632da216aff41a9a30
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228130
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Add delay for power supply startup time before sending source
capabilities packets.
BUG=none
BRANCH=samus
TEST=load on samus, plug in C to A receptacle adapter, see that
VBUS enabled before source cap packet sent.
Change-Id: If3b595e1671d089e859693b420841a639fdb146b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227423
