Servo_v4 requires the ability to have a different default state per
port. In previous devices, the assumption was that each supported port
had the same default usb pd state and power role. This CL moves the
by the default power role which in turn is derived from
CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now
uses 'port' as argument so it can be port specific if required.
PD_DEFAULT_STATE was a board.h specific config, but in practice each
instance used to date was set to PD_STATE_SNK_DISCONNECTED if
CONFIG_USB_PD_DUAL_ROLE was defined and set to
PD_STATE_SRC_DISCONNECTED otherwise.
BUG=chrome-os-partner:61878
BRANCH=servo
TEST=Manual run 'make -j buildall' to verify that all instances of
PD_DEFAULT_STATE were removed.
Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/431787
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
charge_manager may request a charge current limit less than the
capability of the supply in certain cases (eg. during PD voltage
transition, to make an effort to comply with reduced load spec).
Depending on the battery / system state, setting a reduced charge
current limit may result in brownout.
Pass the uncapped / max negotiated current to board_set_charge_limit()
so that boards may use it instead of the requested limit in such
circumstances.
BUG=chrome-os-partner:56139
BRANCH=gru
TEST=Manual on kevin with subsequent commit, boot system with zinger +
low-charge battery, verify devices powers up to OS without brownout.
Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383732
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent:
- When operating as a TCPC, it indicated that the VBUS level should be
tracked (through GPIO inputs) and sent to the external TCPM when
appropriate.
- When operating as a TCPM, it indicated that the VBUS level should be
obtained by querying the TCPC.
These two independent uses have been split into
CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which
sould be more clear.
In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for
other means of VBUS detection.
BUG=chromium:616580
BRANCH=None
TEST=Verify kevin continues to boot + charge.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923
Reviewed-on: https://chromium-review.googlesource.com/348950
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Previously the maximum number of deferred routines was specified by the
the default maximum number of deferred routines you had to override
this, and if you wanted fewer, you still payed the price of having the
defer_until array statically allocated to be the maximum size.
This change removes that define and instead creates the RAM state of
the deferred routine (the time to wait until to call the deferred) when
the deferred is declared.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
manually test on discovery-stm32f072
Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc
Reviewed-on: https://chromium-review.googlesource.com/335597
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Some chips previously defined CONFIG_I2C and others didn't. Standardize
the usage by removing CONFIG_I2C from all config_chip files and force it
to be defined at the board level. Also, make boards define
CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces
they will use - this will assist with some later cleanup.
BUG=chromium:550206
TEST=`make buildall -j`
BRANCH=None
Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310070
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Unless the lid is closed, the ALS is used for lightbar dimming.
Change the google colors depending on the light sensor result.
BUG=chrome-os-partner:44400
BRANCH=smaug
TEST=Check all 3 levels of brightness of the lightbar.
Check value using "adb shell ectool lightbar"
Check double tap color are not affected and is using full brightness.
Change-Id: I7b5e2890c3557f1dd3ae719f5f82ffb5fe7b24fb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301216
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Code for hard iron calibration: Every seconds (or faster if enough
samples), find a sphere that fit the compass data.
Based on Android code.
BRANCH=smaug
BUG=chrome-os-partner:39900
TEST=Check hard-iron bias is removed. Works better outside.
Change-Id: Iab479d5113b6560b4f01b0fd87373d2eecdb9b54
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299583
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Export the board version through the usual EC_CMD_GET_BOARD_VERSION.
Add an option to use the board-specific board_get_version() callback
rather than doing the generic GPIO binary decoding since here the
version is ternary encoded.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=none
TEST=execute 'ectool boardversion' on the AP and see the right number.
Change-Id: I89c328573d09be02232756797ba3fdd5979b0292
Reviewed-on: https://chromium-review.googlesource.com/303368
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 6c620c51e5ab812b4e6751e4c630da2e6bee4b74)
Reviewed-on: https://chromium-review.googlesource.com/303803
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Some sensors are in forced mode, motion sense must be scheduled at
their ODR. However the host may not want the data right away,
so motion task may not wake up the host that often.
Add a new variable motion_int_interval that defines the maximum interval
between FIFO host event.
BRANCH=smaug
BUG=chrome-os-partner:43800
TEST=Check that light sensor is polled at ODR frequency.
Check that when AP does not want any event, no FIFO host event are
requested.
Check CTS tests work as before.
Reenable motion_lid unit test.
Change-Id: Ie25e6cbe28fed899073856057855ffa03c0cd9fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301134
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Increase the change of false positive, but make double feels like Samus:
- increase time beetwen tap to 500ms
- decrease tap threshold to 100mg (actually 62.5mg)
- increase ODR during TAP.
BRANCH=smaug
BUG=b:24440423
TEST=check Ryu and Samus side by side, their tap behavior is more
similar.
run cts -c android.hardware.cts.SingleSensorTests
Change-Id: I260ad95136cb2be71ef4d71efc4bee0b28afa8e0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302627
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Similar to i2c_xfer: allow access to a SPI device registers.
We assume the protocol use is set MSB bit to the offset for read
operation.
id is the index of the device in spi_devices.
BRANCH=smaug
TEST=Read/Write SPI registers.
BUG=none
Change-Id: Id4aaffbb6f514fd47086aee240b556ea23298d33
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289857
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Enable charging from other dual-role devices by default.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=tested on ryu with samus and a third party true dual-role
device.
Change-Id: I6540d00c33394eb66185bc4b5c27cf7c6b405ae8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297807
Reviewed-by: Shawn N <shawnn@chromium.org>
Good rule of thumb for charger current is that it should be set
between C/20 & C/50 for the battery of the device.
For ryu its presently set at 64mA which may explain why we see
charger's status as charging even when battery is full. In any case
its well below recommendation so lets change it to something within
that.
Sampled data (see issue tracker) indicates charging current is ~256mA
when battery reaches 100% charged. Setting to 192mA (3 * 64) to error
on the side of charging slightly longer. This number is still within
termination current recommendation:
C/20 > term_current >= C/50
Note, also changing bq2589x default termination to match its POR value
of 256 as no other board uses this charger presently.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42848
TEST=manual, read charger IC termination register and see termination
current set to 192mA
Change-Id: I60dbb9326c3abb8091fd9ab18eda08b9eabb197b
Reviewed-on: https://chromium-review.googlesource.com/293096
Commit-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add si1141 to the list of motion sensors.
Setup IRQ line and other constants.
BRANCH=smaug
TEST=Check sensor is working
BUG=chrome-os-partner:32829
Change-Id: Ic05bc24164d067a1dee6a6241681420348d7a843
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291336
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.
BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Remove the last pieces of external Sensor Hub support:
- Sensor hub UART exported over case closed debugging
- Sensor hub related GPIOs
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=plug Suzy-Q to Smaug and test debug UARTs and SPI flashing
Change-Id: I47b42f63647735bae37b9256e2704303c48b5854
Reviewed-on: https://chromium-review.googlesource.com/290115
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
boards version 6 / 7 / 8 have an I2C bus to sensors.
board version 0+ has a SPI bus to sensors
On board v0, enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board,
on v7 and v0 boards, check closed case debugging and type-C features
Change-Id: Ic8de2bb0f9d8a15f86a2c1ea98ef27613f090b22
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289960
Enable 3rd SPI port and use it to accel the accelerometer.
BRANCH=smaug
BUG=chrome-os-partner:42304
TEST=Check accel on SPI enabled Ryu board.
Change-Id: If17eff36e2a3ea0fe59d6677aa41ba5f802e33b6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288516
Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.
To have SPI master ports, spi_ports array must be defined.
BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304
Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
use (LID_OPEN == 0 && BASE_PRES_L == 0) as the lid closed condition to
avoid false triggers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, play with magnets and the genuine lid,
check we get the right "lid open" / "lid close" messages on the console.
Change-Id: Ie0a34fb7e45e8a424ff1cfda7662543d4f336f1a
Reviewed-on: https://chromium-review.googlesource.com/287853
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Remove duplicate board_discharge_on_ac() functions and create
CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM for boards that have a
unique implementation of board_discharge_on_ac().
BUG=chrome-os-partner:42294
BRANCH=none
TEST=make -j buildall.
load on samus and test 'ectool chargecontrol discharge' forces
discharging on AC, and 'ectool chargecontrol normal' resumes normal
charging.
Change-Id: I2b7c04b9278d07748d6d41798ceab1a7e90684e4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284911
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Enable code to use BMI150 FIFO and interrupt support on Smaug
BUG=chrome-os-partner:39900
BRANCH=smaug
TEST=Check fifo is working, interrupts are enabled.
Change-Id: Ifc07da793d3ece4806895db4aff5d880c0f3d9b0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274228
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Take profit of the hardware input current ramping/back-off integrated
in the BQ2589x charger by setting the current limits higher for BC1.2
USB modes and letting the hardware adjust to the actual charger
limitation depending on the VBUS voltage droop.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42045
TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current
adjusted to 1650mA without brown-out, read back the value properly from
the AP:
$ ectool usbpdpower
Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW
Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093
Reviewed-on: https://chromium-review.googlesource.com/282584
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Set the resistance compensation for the charger IC according to the EE
team measurements :
- Resistance compensation = 60 mOhm
- Voltage clamping = 160 mV
- Thermal regulation = 120C
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38603
TEST=dump the BQ25892 registers by using the "bq25" command and see that
REG08 contains 0x77.
Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648
Reviewed-on: https://chromium-review.googlesource.com/281660
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously we supported using a single pi3usb9281 chip, or using two
chips on the same i2c bus behind a mux. Now that we need to support a
third configuration of multiple chips on different busses, it makes
sense to be able to configure the configuration freely at the board
level.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I120dcb1c3ceb6f013b92407effcd8cb66e7ffcce
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276511
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Move the task responsible for detection of USB chargers to common code
to reduce code duplication.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I362f8b5b51741509e459c66928131f1f6d2a3b1d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Move parts of usb_pd_config.h that are not part of the phy layer
out of usb_pd_config.h and into board.h. This cleans up the
division between the TCPC and TCPM as only the TCPC needs to
use usb_pd_config.h.
Also cleans up the use of the CC detection voltage thresholds
by creating standard macros to use based on Rp strength for the
board.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270337
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add config options for various parts of USB PD stack:
CONFIG_USB_POWER_DELIVERY: The use of this option has changed
slightly. It now represents whether or not to include the USB
PD protocol and policy layers of the software stack.
CONFIG_USB_PD_TCPC: Compile in type-C port controller module
which performs the phy layer of the PD stack.
CONFIG_USB_PD_TCPM_STUB and CONFIG_USB_PD_TCPM_TCPCI: If
CONFIG_USB_POWER_DELIVERY is defined, then one TCPM needs to
be defined to declare which port management module to use
to drive the TCPC.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I41aa65a478e36925745cd37a6707f242c0dfbf91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270171
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add Primitive support for Bosh Sensor.
Neither gesture nor FIFO are supported.
BUG=chrome-os-partner:39900
BRANCH=none
TEST=Running accelinfo.
From user space, check values via /sys/class/iio/devices/...
Change-Id: I62dbe230c9064ec7c0fa8e343bbe6eae843e3ac0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270455
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
- allow power swap only when we are dual-role toggling (ie in S0).
- enable the VCONN swap feature to support more type-C dongles.
and allow it using the same rule as power swap.
- become a power sink when we are connected to an externally powered
DRP.
- by default, try to be a data UFP for USB.
so Dual Role Device such as laptops can get our data.
- add a message to inform the AP that our USB role has changed
(but the host events are fully wired yet on Ryu)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: Id0f9027b140cb20f105bcdbc00cac5cb5f44c9e0
Reviewed-on: https://chromium-review.googlesource.com/269857
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Enable the support to be a USB-PD alternate mode DFP and add
configuration for the DisplayPort alternate mode and the GFU mode.
Only on Ryu P6 as the P5 board is using the HPD line for the power
sequencing workaround.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:39946 chrome-os-partner:38689
TEST=on Ryu P6, plug a Hoho dongle, see that the superspeed muxes are in
DP1 or DP2 mode (using the "typec 0" command), plug and unplug an HDMI
monitor and see the HPD line moving when typing "gpioget USBC_DP_HPD".
> pd 0 state
Port C0, Ena - Role: SRC-DFP-VC Polarity: CC1 Flags: 0x1150, State:
SRC_READY
> adc
VBUS = 4980
CC1_PD = 992
CC2_PD = 57
> typec 0
Port C0: CC1 993 mV CC2 58 mV (polarity:CC1)
Superspeed DP1
> gpioget USBC_DP_HPD
0 USBC_DP_HPD
<--- PLUG monitor --->
> gpioget USBC_DP_HPD
1* USBC_DP_HPD
Change-Id: Ie25a3bb0d6331c1d931b7f542fbc637270c20b3b
Reviewed-on: https://chromium-review.googlesource.com/269855
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
The charger chip is supposed to handle this feature in hardware.
Let's disable the software version to exercise the hardware.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38603
TEST=on Ryu P6, plug BC1.2 chargers through legacy A-to-C cable.
Change-Id: I074eee0621ba8d23c7ef87dd251ce8fbf86a0265
Reviewed-on: https://chromium-review.googlesource.com/269518
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
- use the TI BQ25892 instead of the BQ24773 as the battery charger,
update the board configuration accordingly.
=> this change is NOT backward compatible with previous boards
- upate GPIOs configuration
- Use the BQ25892 5V boost to source VBUS.
- on the type-C port, Rp has been set to 1.5A, update the USB PD source
limit accordingly and set the boost limit to 1.65A.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38603 chrome-os-partner:39202
TEST=make buildall
run on a P4 modified board with BQ25890 and see the battery charging and
the system running on AC and battery. Plug on C-to-A receptacle adapter
and see 5V.
Change-Id: Id28c9dbd155fe5aedc328bf5ab4da4420495e1f5
Reviewed-on: https://chromium-review.googlesource.com/266021
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Remove all Ryu Proto 4 specific support to make space for Proto 6
configuration : support for both D12 and B8 as PMIC_THERM_L GPIO,
old SuperSpeed mux config.
People with P4/P5 boards can use the ryu_p4p5 board support instead.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38333
TEST=make buildall
Change-Id: I0c5ab5e098d0e4828bee8f576461cd75bbb7b422
Reviewed-on: https://chromium-review.googlesource.com/266020
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Previously the TX and RX queues were being accessed from two
different locations without locking, which is wrong. This
moves the access to a single location in a deffered hook and
calls that hook from the old locations. The result is
correct, simpler, and not much slower. It also reduces time
in the USB interrupt handler by moving the memcpy from packet
to queue out to the deferred hook.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Verify that USB streams still work on Ryu and discovery-stm32f072
Change-Id: I6ea53d7c40b42c6112e86a7886f3b888408f72b7
Reviewed-on: https://chromium-review.googlesource.com/264763
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
The lightbar traces are quite verbose when going through AP power cycles
and prevent people from debugging the current power issues.
Let's turn them off by default, real lightbar lovers can still use
the "chan" command to re-enable them.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=mkae buildall
Change-Id: Ia91f1f9ea2c62a35a0d64e06d377f137ba69fc5e
Reviewed-on: https://chromium-review.googlesource.com/265145
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
When shutting down the MAX77620 PMIC by asserting its SHDN pin, the
EN_PP3300 output of the PMIC (GPIO3) is not driving low keeping the PP3300
rail up. Workaround that issue by removing the pull-up on EN_PP3300 when
we assert SHDN.
Revert the previous CL 263958 aka "ryu: workaround MAX77620 shutdown issue",
in order to use a better workaround which ensures that the power rails
sequencing at startup
Detect the PP1800 rail going up and down by reading the HPD_IN gpio
state (which has a pull-up tied to PP1800), then enable/disable
EN_PP3300 in sequence.
The code using an interrupt on HPD_IN is enabled only on P5,
and as a downside, it is killing the base charging on those boards.
Indeed HPD_IN(C1) is hijacking the EXTINT1 which used to be connected
to the LID_OPEN (E1) GPIO used for the base detection.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:38689
TEST=on both P4 and P5 boards, do various power cycling sequences of the
AP using the "apshutdown" and "powerbtn" commands.
Change-Id: Icad6e9ae6a08d76cbfd19f97dd7c129bf43037d8
Reviewed-on: https://chromium-review.googlesource.com/265186
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
