Commit Graph

8 Commits

Author SHA1 Message Date
Duncan Laurie
30bd74b233 Revert "system: Shutdown AP before entering hibernate mode"
This reverts commit 20c439be20.

Reason for revert: This breaks hibernate on skylake boards and
needs to be tested on more than just kevin before submitting.

BUG=chromium:702451
BRANCH=none
TEST=power down and successfully hibernate on Eve

Original change's description:
> system: Shutdown AP before entering hibernate mode
>
> BUG=chromium:702451
> BRANCH=none
> TEST=manually test on gru: confirm
> 'Alt+VolUp+h' puts gru in hibernate mode and
> AC plug-in wakes it up.
>
> Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096
> Reviewed-on: https://chromium-review.googlesource.com/470787
> Commit-Ready: Philip Chen <philipchen@chromium.org>
> Tested-by: Philip Chen <philipchen@chromium.org>
> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
>

TBR=rspangler@chromium.org,aaboagye@chromium.org,philipchen@chromium.org
# Not skipping CQ checks because original CL landed > 1 day ago.
BUG=chromium:702451

Change-Id: Ie847a5e3efb28256b00ddc6534d8ae6bbbba7121
Reviewed-on: https://chromium-review.googlesource.com/482989
Commit-Ready: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2017-04-21 06:03:57 -07:00
Philip Chen
20c439be20 system: Shutdown AP before entering hibernate mode
BUG=chromium:702451
BRANCH=none
TEST=manually test on gru: confirm
'Alt+VolUp+h' puts gru in hibernate mode and
AC plug-in wakes it up.

Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096
Reviewed-on: https://chromium-review.googlesource.com/470787
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
2017-04-14 13:49:31 -07:00
Divagar Mohandass
598d580a63 ISH: HPET Timer Configuration.
This change includes
- Configuring the HPET timer based on the spec
  (IA-PC HPET (High Precision Event Timers) Specification 1.0a)
- Two timers used:
  HPET Timer0 (free running periodic timer)
  HPET Timer1 (event based non-periodic timer)
- HPET interrupts are routed to ISH via IOAPIC
- Both the timers are functional

BUG=None
BRANCH=None
TEST=`Build ISH and verify the timer interrupt via various console cmds`

Change-Id: Ib5ca24d05790868430a2cfa72ca73f5bd6a5fea3
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/453858
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-03-29 09:06:55 -07:00
Shawn Nematbakhsh
f0b564b4a0 system: Add generic bbram read / write routines
Add generic routines to read or write a byte to battery-backed RAM, and
implement vbnvcontext get/set using these routines.

BUG=chrome-os-partner:62952
BRANCH=reef
TEST=On reef, with subsequent commit, run "cutoff" on the console,
reattach AC, and verify device successfully wakes. Also verify Rp is
dropped on console 'reboot' and F3 + power from RW.

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I14691923f2e5198e901b6b5199e92c58c68cd18d
Reviewed-on: https://chromium-review.googlesource.com/444444
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-02-24 15:23:24 -08:00
Kyoung Kim
166d7a72df ISH: Added UART Rx/Tx interrupt mode
Added UART Tx/Rx interrupt mode related code.

BUG=None
BRANCH=None
TEST=On ISH enabled Reef board, check if Tx message is working
and tested Rx input from console with console command.

Change-Id: I5067304dc74abc29bbbea983b22db3e193e36e6b
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/424322
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
2017-01-11 14:46:29 -08:00
li feng
f50b1cec17 ish: correct i2c write operation buffer size
ISH i2c write operation failed due to wrong buffer size passed.

BUG=None
BRANCH=None
TEST=On reef ISH enabled board, verified sensor i2c read/write are
successful.

Change-Id: Icda625ad16e1e60832bb22e3148e23fcb8e6a937
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/418876
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-12 18:34:32 -08:00
Kyoung Kim
fa1cec0b60 ISH: fix UART reference clock
UART reference clock is 100KHz for ISH4 and 120MHz for ISH3

BUG=none
BRANCH=None
TEST=`make buildall -j`

Change-Id: Ie33e0bd33e0a0c8e56a58fcf4a48677d38c9d61e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/409594
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-11 00:12:33 -08:00
Jaiber John
d7b938f857 ish: Add support for ISH chip
This patch adds the initial support for ISH chip to enable the EC
firmware to boot on Intel Integrated Sensor Hub (ISH). The following are
enabled:

1. Inter-Processor Communication (IPC) driver that enables the ISH to
communicate with the host Operating system via shared registers.
2. High Precision Event Timer (HPET) driver that provides configurable
timers for the FW to use in task scheduling.
3. I2C bus driver for accessing sensors.
4. UART console driver with TX support only.

BUG=chrome-os-partner:51851
BRANCH=None
TEST=`make buildall -j`

Change-Id: I15d4c201b799cfa79bed220ee573b75f5cd7b1f7
Signed-off-by: Jaiber John <jaiber.j.john@intel.com>
Signed-off-by: Alex Brill <alexander.brill@intel.com>
Signed-off-by: Gomathi Kumar <gomathi.kumar@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/336710
Commit-Ready: Raj Mojumder <raj.mojumder@intel.com>
Tested-by: Jaiber J John <jaiber.j.john@intel.com>
Tested-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Jaiber J John <jaiber.j.john@intel.com>
Reviewed-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-04 18:31:29 -07:00