Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enable CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS. Build,
flash, and verify AP and EC boot. Suspend/Resume and verify that port80
data is in the history.
TEST='sysjump rw' suspend/resume nad verify that new port80 writes are
present in the history.
TEST=make -j buildall tests.
CQ-DEPEND=CL:311209
Change-Id: Idebb3247b55465f1fbf35a33dff2f00968b8f4ce
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311365
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The only boards that had a port 80 task were the ones using the MEC1322.
Since that EC now has a dedicated timer interrupt configured for port80
writes, we can remove this code that was providing the port 80 task.
Additionally, the config option CONFIG_PORT80_TASK_EN is removed.
BUG=chrome-os-partner:46062
BRANCH=None
TEST=make -j buildall tests
CQ-DEPEND=CL:305591
Change-Id: I145d989b8872240e749ef77aabe0ae76fc94d443
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/305791
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
port80 task polling prevents the EC from entering low power states and
isn't useful when the AP isn't running. Therefore, when
CONFIG_PORT80_TASK_EN is enabled, only enable the port80 task when
entering S0, and disable it when leaving S0.
BUG=chrome-os-partner:42104
TEST=Manual on Glados. Boot AP, verify that 'port80' log starts with "10
20...". Shutdown AP, verify with 'taskinfo' that PORT80 task stops
consuming cycles. Boot AP again, verify that 'port80' log starts with
new "10 20...".
BRANCH=None
Change-Id: Id41dbdaa4597456d042b7a3921c1ec439af759f4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285550
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
With mec1322's EMI set to decode IO 0x800, it does not have any other
interfaces to support POST code via IO 0x80.
This change is to enable Port80 POST code support via polling method.
Limitation:
- POST Code 0xFF will be ignored.
- POST Code frequency is greater than 1 msec.
BUG=chrome-os-partner:39386
TEST=Verified Port80 POST code is captured in EC console.
Verified "port80 task" console command will disable/enable Port80 task.
Verified "port80 poll" will get the last Port80 POST code.
BRANCH=none
Change-Id: I27e53e84b5be1fd98464a44407dd58b93d8c798d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/266783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
While debugging reboot issue, it was difficult to get POST code from failing
boards. Currently POST code is only accessible from EC console. Not all boards
are fitted with servo board.
This patch adds Port 80 history access from ectool. Reuse command code 0x48,
EC_CMD_PORT80_LAST_BOOT with version 1.
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
BUG=chrome-os-partner:28514
BRANCH=rambi
TEST=manually test on rambi to confirm port 80 history match EC console
Change-Id: If204d8fb457d8d8d18055f8282a406a35c03305e
Reviewed-on: https://chromium-review.googlesource.com/198012
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Wenkai Du <wenkai.du@intel.com>
Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Tested-by: Wenkai Du <wenkai.du@intel.com>
Just code cleanup; no functional changes
BUG=chrome-os-partner:15579
BRANCH=none
TEST=build link and snow
Change-Id: Ib62f805777994b39cd9f47a721f52529bb9399c5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36573
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add a special port80 event for LPC reset assertion and use that event
to store the previous post code.
- Add a new command to retrive the last saved post code so I can easily
query it at boot/resume and log unusual codes.
BUG=none
TEST=manual (with additional coreboot/mosys changes)
- interrupt boot process by issuing x86reset on EC console or
by using warm reset button on servo
- read event log with mosys on next boot
78 | 2012-08-13 09:24:04 | System boot | 262
79 | 2012-08-13 09:24:04 | Last post code in previous boot | 0x9e
80 | 2012-08-13 09:24:04 | System Reset
Change-Id: I7b9f10442b9c468d89fde4e75adb94b0c07c2c8d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29995
Reviewed-by: Randall Spangler <rspangler@chromium.org>
- 'port80 intprint' toggles printing port 80 codes in interrupt
handler (turning that off speeds up port 80 capture a bit, if you're
sending port 80 codes very rapidly)
- 'port80 flush' flushes the log buffer
- log buffer expanded to 256 entries
- log buffer tracks S3->S0 power state transitions, so you can tell
where each boot starts
This uses ~500 bytes more RAM on the EC, but we've got piles of RAM
(with this change we're using 17KB out of 32KB).
BUG=none
TEST=manual
- boot system
- port80 -> prints data
- port80 intprint -> now disabled
- reboot; wait for reboot; no port80 debug output during boot
- port80 -> prints data from previous boot AND this one
- port80 flush
- port80 -> nothing in log
Change-Id: I64ee72fb13ab0fdd85d04b9640b5390fdac31400
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29420
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
BUG=chromium-os:31902
TEST=manual
1. reboot ec
2. port80; nothing there
3. powerbtn
4. retype port80 repeatedly during boot and see it fill and then scroll
Change-Id: Id227d5debbdd635332ed2f42bc0f163833031b5c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25442
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Additional help messages and usage are gated by
CONFIG_CONSOLE_CMDHELP, so we can turn it on if there's space (adds
about 3KB to image size) and turn it off when there isn't.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual
1) help
2) help list
3) help gpioset
4) gpioset -> wrong number of params
5) gpioset fred 0 -> param1 bad
6) gpioset cpu_prochot fred -> param2 bad
Change-Id: Ibe99f37212020f763ebe65a068e6aa83a809a370
This completes console output cleanup. The remaining calls to
uart_puts() and uart_printf() actually need to be that way.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=manual
Change-Id: Ib1d6d370d30429017b3d11994894fece75fab6ea
This adds a 'ch' command which prints/sets which channels are active
This handles all the async output; the remaining debug commands will
be refactored to use ccprintf() / ccputs() in a followup CL.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=manual
ch --> all channels active
ch 0x100 -> just port80 active
powerbtn -> system boots; only port 80 codes shown on console
Change-Id: I9efc43acec919b62b78c2c82c61946d32380adfe
We can clear the reset cause in system pre-init now because of a
previous change which preserves it across a sysjump.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: I1d8b99df5a0be0de9545d22ad1a6b7fb3140f813
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8724
TEST=if timestamps show up in the debug output, it works
Change-Id: I5264a3a40a07a824cc15b39a7bd81f2db02a3c13
The kernel no longer uses port 80 as a delay mechanism, so we don't
need to detect the no-longer-present spammy writes.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7972
TEST=port80 scroll, then boot the system. see a few repeated bytes,
but not piles of 00 and ff's.
Change-Id: Id14dc43ab4e1b15c6bab99a17c062f295a59e7e6
It was scrolling so much that the EC debug output for power state
transitions was getting lost. Now it uses CR instead of LF.
Use 'port80 scroll' to turn scrolling back on (it's off by default).
Port 80 history is still visible via the 'port80' command, in all cases.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=powerbtn ; power on; should not scroll screen
port80 ; confirm history is still there
port80 scroll ; enable scrolling
powerbtn ; turn system off
powerbtn ; turn system back on; should scroll screen
port80 ; confirm history is still there
Change-Id: I85d058ff0b2b9d3d5296060747bde5e872b85817
Instead of using a runtime callback to register the console commands,
put them in a special linker section. So we can do a macro to "register"
them during the build.
It saves 684 bytes and a few microseconds at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run a few commands from the BDS command line.
Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
