This patch adds CBI_GET_RELOAD flag to EC_CMD_GET_CROS_BOARD_INFO
command. When the flag is set, the command will be forced to read
data from EEPROM even, ignoring the data cached by the previous
read.
This allows ectool to verify a write was successful without reboot.
BUG=b:70294260
BRANCH=none
TEST=ectool cbi set 0 0x1234 && ectool cbi get 0 1
Change-Id: I3e7ced5be56a74c605870a4c0622c0a2f47963bb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/874155
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds host command to write board information in EERPOM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi set <type> <value> to write BOARD_VERSION, OEM_ID,
and SKU_ID. Enable WP and verify cbi set command fails.
Change-Id: I39536d146313408ace666f350a107d89b331bf7a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865570
This patch adds host command to get board info from EEPROM.
BUG=b:70294260
BRANCH=none
TEST=Run ectool cbi get <type> to get board version, OEM, SKU
Change-Id: I41a84d3eea6da9d88fa8122db36dcd1df515842d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/865161
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds Cros Board Info APIs. It reads board info from EEPROM.
This patch sets CONFIG_CBI for Fizz to make it use CBI.
BUG=b:70294260
BRANCH=none
TEST=Read data from EEPROM.
Change-Id: I7eb4323188817d46b0450f1d65ac34d1b7e4e220
Reviewed-on: https://chromium-review.googlesource.com/707741
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
In this CL, we add the following changes to support the CHIP_VARIANT
npcx7m6xb and npcx7m7w:
1. Define the code RAM, data RAM, BBRAM base address/size.
2. Initialize the wov.c file for WoV driver development. (It will be
compiled only when CHIP_VARIANT=npcx7m7w in the build.mk and
CONFIG_WAKE_ON_VOICE is defined in board.h)
3. Fix the the incorrect offset of PWDWN_CTRL7 register.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change CHIP_VARIANT to npcx7m7w/npcx7m6xb in
board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be
built. Flash the image on EVB; make sure EVB bootup.
Change-Id: I87bccb9097f8f0a6c67f96a8d90adf201ae9e773
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/858637
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
pwr_avg provides an average voltage, current, and power over the last
1 minute. It's up to the battery drivers to implement this
functionality.
This change allows us to have better power tracking while minimizing
the power impact on the EC, because
- the pwr_avg command only needs to be called once every minute, and is
short, thus less expensive to parse on ECs without a UART buffer
- the work done to keep the avg is partially done by the batteries
already and it's just a question of retrieving it.
undefined on wheatley since no power debugging planned on that board.
usage:
> pwr_avg
mv = 7153
ma = -605
mw = -4327
BUG=chromium:752320
BRANCH=None
TEST=make buildall -j
Change-Id: Id1a3479d277aedf90dfa965afb4ee9136654b1cf
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/823884
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When user is trying to execute 'ccd open' or 'ccd unlock' and password
is set, the return error code does not allow to tell the reason for
the command failure.
Let's add a distinct return code to indicate this condition so that
the user can supply password.
BRANCH=cr50
BUG=b:62537474
TEST=verified along with the accompanying gsctool modifications.
Change-Id: I286f87ab12114cd7dd7ebcdf0e321f7a24723367
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861208
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When implementing 'ccd open' and 'ccd unlock' through gsctool, we need
to be able to pass to the host the state of the physical presences
state machine regarding the expected user action (pressing the PP
button).
Two new VENDOR_CC_CCD subcommands are being added: CCDV_PP_POLL_OPEN
and CCDV_PP_UNLOCK. In response to these commands, the Cr50 always
returns VENDOR_RC_SUCCESS return code and a single byte payload
showing the CCD and PP state:
- CCDPP_CLOSED - PP process is not running, CCD closed. Maybe user
missed a button press deadline.
- CCDPP_AWAITING_PRESS (self explanatory)
- CCDPP_BETWEEN_PRESSES (self explanatory)
- CCDPP_PP_DONE - CCD is opened/unlocked (as per user request), PP
process succeeded.
BRANCH=cr50
BUG=b:62537474
TEST=with the upcoming change to gsctool verified that PP states are
properly conveyed to the user.
Change-Id: I97b1fef4440eea93c5c5ac01b7c60bfce9a4595c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861001
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Depending on device configuration and compile time options, CCD
commands 'open' and 'unlock' could either be executed immediately, or
require the user to take the device through physical presence state
machine.
As these commands execute through TPM vendor commands, there needs to
be a different return value indicating that the command action is not
finished and PP process is in progress.
Let's add another vendor command return value, and do not consider it
a failure if vendor command returns this value in response to 'ccd
open' or 'ccd unlock'.
BRANCH=cr50
BUG=b:62537474
TEST=took an Eve through 'ccd open' sequence
Change-Id: Ie62ccfb4319a13b6fb6c1c854a0ea26beb9f517c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860999
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds an API which exports current physical presence state
machine state to allow the caller to see if the state machine is in
one of the three distinct states:
- no PP process in progress
- user PP input is expected
- PP process in progress, user input is not currently expected
BRANCH=cr50
BUG=b:62537474
TEST=with the rest of the patches applied verified that PP state is
properly communicated through this API.
Change-Id: Ia10cd20c490dadef595f30e0b7257e51b6abf8fa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860998
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Using and extending the existing framework, move ccd commands
'password, lock, open, and unlock to the same processing path.
The first three commands accept a single parameter, password. It is
required for the password command and optional for unlock and open.
The lock command does not require any parameters.
Wiping the TPM, if necessary, now happens on the same context where
CCD command is executed, i.e. the TPM task context. This is why the
same context TPM reset function needs to be exported and used here.
ccd_open() and ccd_unlock() could be further refactored, this would
require a bit more effort to find appropriate balance between
commonalities and differences.
BRANCH=cr50
BUG=b:62537474
TEST=verified that ccd commands to open, unlock, lock and set and
clear password all work.
Change-Id: I2b9f2b550347b590a55bfaef262a4f050d3f4c1c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/854709
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of defining these options in other header files, set them
here. This also prevents pre-submit checks from complaining
about these symbols being used without being defined in config.h.
BRANCH=none
BUG=b:65697962
TEST=make buildall -j, presubmit checks pass for CL that makes
use of CONFIG_EC_EC_COMM_BATTERY_MASTER.
Change-Id: I8098a8ae6422bf0ffb26523785d7c16a3ee1c6df
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861365
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We want CCD commands lock, open, password, and unlock (at least to
start with) to be available over both CLI and through crosh (i.e.
coming over /dev/tpm0).
Let's allocate a TPM vendor command for handling all CCD subcommands,
and move to this new framework the 'ccd password' command, which
already is available over vendor command.
BRANCH=cr50
BUG=b:62537474
TEST=verified that 'ccd password' still works both over Suzy-Q CLI and
using gsctool on the target.
Change-Id: I2d06230b762f47af7e580b188a587bc5678ca169
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/853280
Reviewed-by: Randall Spangler <rspangler@chromium.org>
flags are actually _not_ BATT_FLAG_*, but EC_BATT_FLAG_*. Clarify
that in the comment, and add a new EC_BATT_FLAG_INVALID flag to
indicate that some of the data may be invalid (dual-battery master
needs to know that to make appropriate charging/discharging
decision).
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Flash hammer and wand, flags make sense.
Change-Id: I3c428c850020a29b3f452504b60b52946a04c503
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/859400
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Without this, the battery will discharge if we disallow battery
charging (e.g. calling charge_request with either voltage == 0 or
current == 0, either by policy, or when the battery is full).
Also update config.h to set the option whenever isl923x is used.
BRANCH=none
BUG=b:66575472
BUG=b:35585464
TEST=make buildall -j
Change-Id: Id5515d5ea82a393a3693a3da44cbdc2778296a95
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/856538
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
On ISL923x, PSYS output is always enabled when the AP is on
(provided CONFIG_CHARGER_PSYS is enabled).
We add support for charger_get_system_power function, reading PSYS
value, when CONFIG_CHARGER_PSYS_READ is defined. This will be used
by the charging algorithm on lux.
We also rename CONFIG_CMD_CHARGER_PSYS to CONFIG_CHARGER_PSYS_READ
as CONFIG_CHARGER_PSYS_READ provides both "psys" console command
and the new function. We also cleanup unneeded undefs in board
files.
Note that this does not implement the function on bd9995x, but this
could be done without too much effort.
BRANCH=none
BUG=b:71520677
TEST=On lux, without AC connected, check that "psys" output roughly
matches the output current from the battery.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: Ie1ce8e0ac103daacc5a08b8ccae604d1d83551b8
Reviewed-on: https://chromium-review.googlesource.com/848487
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
If a bios carries an EC image signed by a wrong key, EFS EC falls back
to the previous slot upon reboot. Vboot currently does not handle this
case and tries to update the EC with an incompatible image again.
When this happens, a user sees 'applying critical update' screen
repeatedly.
This patch adds EFS_VERIFYV host command. Vboot on AP calls it to check
whether the EC likes a newly updated image or not. If the verification
fails, it's considered as update failure and vboot displays 'broken'
screen.
BUG=b:71719323
BRANCH=none
TEST=Flash EC SPI with an image which has a different RO key. Boot DUT
and let it run software sync. EC-RO rejects the updated image and falls
back to the previous one. The update counter is incremented and vboot
shows the 'broken' screen, requesting recovery.
Change-Id: I8a107a376963baa146ff691c50d80018ec3e429c
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/858159
Reviewed-by: Randall Spangler <rspangler@chromium.org>
SYNC motion sensor are use to count event.
It sends an event to the AP each time a GPIO goes low/high, the datum
contains a 16 bit counter.
The location indicates the source of the event, as Android sensor hal
will use this information (via sysfs location attribute) to link the
sensor with other subsystem.
BUG=b:67743747
BRANCH=none
TEST=Unit tests.
Change-Id: Ia808b25730ad4100efa216c6a86b7b090197c5a3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848496
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add the driver for the new silicon used in STM32H7 SPI controller,
including its bad errata when used with DMA.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, do finger image acquisition on the SPI fingerprint
sensor.
Change-Id: Ieaf4a09e961d3e0ef78b58886c409a7dfb63aaf3
Reviewed-on: https://chromium-review.googlesource.com/836617
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This adds functions required for the master in EC-EC communication,
requesting base battery static and dynamic information, and charger
control.
BRANCH=none
BUG=b:65526215
TEST=Flash lux and wand, EC-EC communication works.
Change-Id: I7a46ee3f5848d22c2c9bea7870cbd7e74141cf3d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/839201
This function sets up and enables "OTG" mode on the charger chip
(i.e. use the charger to provide power from the battery).
It also records the output current in curr.output_current, to
make sure that the charger loop is aware that current is provided
externally.
We also add a CONFIG_CHARGER_OTG to remove these functions on
boards that do not require it.
BRANCH=none
BUG=b:65697962
TEST=On wand, when discharging, battery status is updated every
5 seconds (and not every 60 seconds).
Change-Id: Ibf93933436f3eb24552a8e1eb9d97522fca2ce79
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/842743
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Modify chipset_in_state to always say that the chipset is off,
when we do not actually have a chipset (like on hammer): that
makes sure the battery can actually be cut off (else the EC
would just wait forever for the chipset to turn off).
Also, wake the charger state on "AC" change, that is, when
charging_allowed changes state, to make sure the charging loop
is executed after lux tries to charge it (else the charging loop
would wait until timeout expires, and wand would ask the battery
to be cut off again).
BRANCH=none
BUG=b:65697962
TEST=Deplete wand battery, reboot without providing external power
to it.
After 30 seconds, battery is cut off:
[1.354683 Low battery: 2%, 6866mV]
[1.354888 charge warn shutdown due to critical battery]
[31.381410 Low battery: 2%, 6865mV]
[31.381643 charge force battery cut-off due to critical level]
TEST=Upon providing power to wand, charging loop is executed
regularly, and battery is charging.
Change-Id: I7154b25bd852b8422a0ae3b506675a297a948132
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/842742
Reviewed-by: Randall Spangler <rspangler@chromium.org>
current is actually a reserved keyword in the Linux kernel,
replace it by actual_current. And voltage by actual_voltage for
consistency.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=make buildall -j
Change-Id: I8b8115174d15a1cc4b1189a54104bfec559ed72c
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848460
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
This adds the driver for the SB-TSI temp sensor.
This is a sensor on the AMD AP SOC (Stoney Ridege FT2) that acts like an
8-pin temp sensor with an I2C interface.
BUG=b:69379715
BRANCH=None
TEST=Build
Change-Id: Iaafe6c7beb3e02e4e341617e8f117c03c0a882a2
Signed-off-by: Alec Thilenius <athilenius@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/833346
Commit-Ready: Alec Thilenius <athilenius@google.com>
Tested-by: Alec Thilenius <athilenius@google.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Add espi_signal_is_vw in new file common/espi.c for
testing if a signal is an eSPI virtual wire. API used
in power common and intel_x86.
Fix CONFIG_BRINGUP support for eSPI (off by default).
Add espi_vw_get_wire_name returning a pointer to
constant string. Chip modules do not need to maintain
names of eSPI signals.
BRANCH=none
BUG=
TEST=Build poppy and other eSPI enabled boards. Test
power state machine.
Change-Id: I13319e79d208c69092a02ec3ac655477d3043d61
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/836818
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add Microchip MEC17xx family trace fifo debug
(TFDP) files. TFDP is a MCHP specific two pin,
output only software message port.
Added TFDP module ID.
Change-Id: Ibe2399a8c3618b207a89552450d80b7901e85f23
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Added I2C sensors ADT7481 and TMP411 with config
items and build rules.
BRANCH=none
BUG=
TEST=Define CONFIG_TEMP_SENSOR_ADT7481 or _TMP411
and build board.
Change-Id: I4d1eb55ee56ad3f42787538bb839193e683d0a60
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Modify ALS module to use CPRINT macros with
channel support.
BRANCH=none
BUG=
TEST=Build board(s) with ALS support such glados.
Test ALS CPRINT messages go out over EC UART and
can be masked off by channel mask UART command.
Change-Id: I65ffc889d63a778f3fb8995f508773842ba875ef
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
Experimental and disabled by default feature for
powering down GPIO pins on those EC's supporting it.
Pins may be powered down by module ID or pin name.
Goal is to make use of common GPIO pin table.
If enabled, developer must implement power down
support in chip level. Developer re-powers module
pin(s) by calling the current gpio module enable
API in the wake path.
BRANCH=none
BUG=
TEST=Feature is disabled by default. Build all
boards with feature disabled.
Change-Id: Ifacd08e51def6424baf5c78c84b24f1d9f4bc4aa
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
BRANCH=none
BUG=
TEST=Review only. Committing small pieces until
all code passes review.
Change-Id: I9d16f95314a7c97b11c4fe61602c6db2621e6024
Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
For compatibility/convenience, implement the '%li' printf format
as a *32-bit* integer format, as it might be expected by non-EC code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:70320279
TEST=run on Eve EVT with unspecified external binary and see its traces
are correctly printed.
Change-Id: Iac20e823c74aac4f659176416eebd804c321d47c
This adds functions required for the slave in EC-EC communication,
including the task that processes requests from the master.
This also adds required CONFIG_EC_EC_COMM_SLAVE/MASTER/BATTERY
config options.
BRANCH=none
BUG=b:65697962
TEST=Build wand and lux boards, flash it, EC-EC communication works.
Change-Id: I772d9023a830f4fbc37316ca31e4da8240de7324
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/828180
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds 3 commands to obtain static and dynamic battery
information, as well as control base charger state.
These host commands are meant to be used as part of the EC-EC
communication protocol (based on hostcmd v4 protocol), but could
be used in the future to pass information between AP and EC,
especially when more than 1 battery is present, which would be
hard to support with the current MEMMAP-based approach.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Build wand and lux boards, flash it, EC-EC communication works.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I263454794394838918832c9e4623835ab2f3a3da
Reviewed-on: https://chromium-review.googlesource.com/670380
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The CONFIG_BUTTON_RECOVERY option was a little confusing especially when
we have the CONFIG_DEDICATED_RECOVERY_BUTTON option. This commit
renames CONFIG_BUTTON_RECOVERY to CONFIG_BUTTON_TRIGGERED_RECOVERY to
help make things a little clearer.
Additionally, to avoid copy paste, defining
CONFIG_BUTTON_TRIGGERED_RECOVERY will populate the recovery_buttons
table with either the volume buttons or a dedicated recovery button
depending what the board is configured for.
Lastly, if CONFIG_DEDICATED_RECOVERY_BUTTON is defined,
CONFIG_BUTTON_TRIGGERED_RECOVERY is defined as well since it's implicit.
BUG=chromium:783371
BRANCH=None
TEST=make -j buildall
Change-Id: Idccaa4d049ace0df3b98b35bdd38ac9dbd843200
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/830917
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Nobody is calling the flush function for consumer_ops structure,
so let's remove it to save flash space, until we find a use for it.
CQ-DEPEND=CL:*529221
BRANCH=none
BUG=chromium:795624
TEST=make buildall -j, saves from 40 to 128 bytes on some boards.
Change-Id: Iad18b30f419ccebc54a90914ec46da84b8d19601
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/826905
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The PPC needs to update its Vbus source current limits whenever our
policy changes on the PD ports. This commit simply adds and API to do
so.
BUG=None
BRANCH=None
TEST=With some extra code to enable 3A out, flash zoombini; Plug in a PD
device to a port, verify that it gets 5V @ 3A. Plug in a second device,
verify that we re-send new source caps of 5V @ 1.5A.
TEST=Repeat above for meowth.
Change-Id: Ifa4bc8b7df87f7730f2bcded842906d43171394b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/818335
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The size of empty structs (and unions) varies between C and C++. When
including in C++ code our external API in ec_commands.h header with
extern "C". clang will complain (correctly) for all empty structs:
error: empty struct has size 0 in C, size 1 in C++
[-Werror,-Wextern-c-compat]
Remove them from the ec_commands.h header file.
ectool.c has some ugly macros which assume subcommands have both
requests and responses. Change those macros so they only reference
the non-empty sub-structs. The macros are still ugly, but generate
identical output, and don't rely upon zero-length structs.
BUG=chromium:792408
BRANCH=none
TEST=manual
1) Compile the following using 'clang -Wall -Werror':
#include <stdint.h>
extern "C" {
#include "include/ec_commands.h"
}
int main(void) { return 0; }
It compiles without error.
2) Copy the lb_command_paramcount, ms_command_sizes, and
cs_paramcount globals from ectool.c to a dummy .c file and
compile with 'gcc -S' to generate assembly. Do the same
after applying this patch.
Confirm the arrays have the same contents.
Change-Id: Iad76f10315b97205b42118ce070463071fe97128
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/820649
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Pull-down means backlight is present, pull-up means backlight
is absent.
After detection, we still apply internal pull-down on the GPIO,
to make sure old boards with both pull-up and pull-down stuffed
do not always keep backlight on.
BRANCH=none
BUG=b:67722756
TEST=On reworked board with pull-down on backlight pin,
backlight works, and "Backlight present" shown in console.
TEST=On old board with both pull-up and pull-down, backlight is
off by default, and "Backlight not present" shown in console.
Change-Id: I6988c6ef8f4d155a08967db34f72d7ea4c835306
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/538458
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Right now, the only events that are unmasked by default are overcurrent
conditions on PP1. This commit adds a simple interrupt handler and
introduces a board specific callback when the overcurrent status changes
on a port. This way, a board can take whatever action it desires with
the notification.
BUG=b:69139844
BRANCH=None
TEST=Flash zoombini with SN5S330 stuffed. Verify that board boots okay.
TEST=With some extra code to setup the interrupt handler, attempt to
exceed the current limit set, verify that interrupt handler is called.
Reduce the current pulled to under the current limit, verify that the
condition is no longer present.
CQ-DEPEND=CL:797937
Change-Id: Id3321c5703f9608da895be0ed5841f2fb76e734e
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/797936
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Setting password should be allowed only after the owner logged in for
the first time and before they log out or someone else logs in.
Once any other user but the owner logs in, it should become impossible
to set password until the device is reset.
As proposed here, this would apply to both attempts to set password
through crosh and Cr50 console.
Password handling on Cr50 passes the following states:
- password setting is not allowed after Cr50 reset until an upstart
(as opposed to resume) TPM startup happens, as signalled by the TPM
callback. After the proper TPM reset the state changes to
'POST_RESET_STATE' which means that the device was just
reset/rebooted (not resumed) and no user logged in yet.
- if the owner logs in in this state, the state changes to
'PASSWORD_ALLOWED_STATE'. The owner can open crosh session and set
the password.
- when the owner logs out or any user but the owner logs in, the state
changes to PASSWORD_NOT_ALLOWED_STATE and does not change until TPM
is reset. This makes sure that password can be set only by the owner
and only before anybody else logged in.
Separate changes to the TPM library code make sure that TPM reset is
reported through the platform layer, so that POST_RESET_STATE is
entered.
BRANCH=cr50
BUG=b:67007578
TEST=with the rest of the infrastructure in place verified that
password can be set only when the owner logged in for the first
time before anybody else logs in or the owner logs out.
Change-Id: Ieaa3dc8ff9d2e43ae11151eb31173220f5c75b58
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/804141
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
There might be more than one place that will use very similar codes in
CL:542716 (usb_i2c.c). To avoid unnecessary duplication of code, we fold
the logic into i2c_xfer(). With config enabled (illustrated in this CL),
i2c_xfer() will support large reading. An early prototype of potential
usage is demostrated in CL:781300.
BRANCH=none
TEST=For CONFIG_I2C_XFER_LARGE_READ:
With proprietary software on slave: ./touchpad_updater -d
TEST=For usb_i2c regression:
./touchpad_updater still works (where the reading is less than 255)
TEST=For generic EC regression test:
On poppy EC (With CONFIG_I2C_XFER_LARGE_READ defined)
(1) Prevent override of update
/usr/share/vboot/bin/set_gbb_flags.sh 0xa39
(2) flashrom -p ec -w ec_binary_contains_this_CL.bin
(3) ectool reboot_ec cold
(4) "ectool version" verified that both RO/RW/Build info is local.
(5) Test with a type-C DP dongle on DELL 2408WFP.
(6) Plug-in type-C charger and external display still works.
(7) Confirmed that battery is charging.
(7) "ectool battery" reads same data (for fixed field) as before.
(8) "ectool usbpdpower", confirmed charger info displayed as before.
(9) "ectool usbpd 0", confirmed content exactly as before.
(10) For Gyro. Verify under Arc++
Using App: com.gamma.bubblelevel, works the same as before.
(11) For Accelerometers. Verify under Arc++
Using App: com.innoventions.sensorkinetics,
small movement's charts looks as expected.
TEST=For generic EC regression test:
On Caroline EC (Without CONFIG_I2C_XFER_LARGE_READ defined).
Details in CL:810332
BUG=b:63993891
Change-Id: I654868945fa535e784800177d54eb2d9803f5249
Signed-off-by: Chun-Ta Lin <itspeter@google.com>
Reviewed-on: https://chromium-review.googlesource.com/788479
Commit-Ready: Chun-ta Lin <itspeter@chromium.org>
Tested-by: Chun-ta Lin <itspeter@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The SN5S330 has support for detecting when Vbus is present on a port.
This commit simply adds an API to query the PPC.
BUG=None
BRANCH=None
TEST=`make -j buildall`.
TEST=Flash a board with the SN5S330, with some extra code, verify that
Vbus can be detected with this API.
Change-Id: I45bf7ff24bcdc447efe12932f51f8094108e29d5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/791502
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Unified Host Event Programming Interface (UHEPI) enables a unified host
command EC_CMD_PROGRAM_HOST_EVENT to set/get/clear different host events.
Old host event commands (0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E,
0x8F) is supported for backward compatibility. But newer version of
BIOS/OS is expected to use UHEPI command (EC_CMD_PROGRAM_HOST_EVENT)
The UHEPI also enables the active and lazy wake masks. Active wake mask
is the mask that is programmed in the LPC driver (i.e. the mask that is
actively used by LPC driver for waking the host during suspended state).
It is same as the current wake mask that is set by the smihandler on host
just before entering sleep state S3/S5. On the other hand, lazy wake masks
are per-sleep masks (S0ix, S3, S5) so that they can be used by EC to set
the active wake mask depending upon the type of sleep that the host has
entered. This allows the host BIOS to perform one-time programming of
the wake masks for each supported sleep type and then EC can take care
of appropriately setting the active mask when host enters a particular
sleep state.
BRANCH=none
BUG=b:63969337
TEST=make buildall -j. And verfieid following scenario
1). Verified wake masks with ec hostevent command on S0,S3,S5 and S0ix
2). suspend_stress_test with S3 and S0ix
3). Verified "mosys eventlog list" in S3 and s0ix resume to confirm
wake sources (Lid, power buttton and Mode change)
4). Verified "mosys eventlog list" in S5 resume to confirm wake sources
(Power Button)
5). Verified above scenarios with combination of Old BIOS + New EC and
New BIOS + Old EC(making get_feature_flags1() return 0)
Change-Id: Idb82ee87fffb475cd3fa9771bf7a5efda67af616
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/576047
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Commit-Ready: Jenny Tc <jenny.tc@intel.corp-partner.google.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit introduces a driver framework for power path controllers.
It provides some common PPC APIs as well as allowing a board to use
multiple different PPCs drivers/parts. This should make it easier to
add PPC drivers in the future.
BUG=None
BRANCH=None
TEST=`make -j buildall`
TEST=Flash zoombini; verify PPC works as expected.
TEST=Flash meowth; verify PPC works as expected.
Change-Id: Icfb99f384610590b431456cfd28d4aff18442cb2
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/807630
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
