Deep sleep needs to be considered a normal behavior and should not add
to the rollback count. This change subtracts one from the reset count
when the system sees that it just resumed from deep sleep.
Ideally the rollback counter would be able to verify the TPM
functionality and detect rolling reboots. With this change the rollback
counter will only be able to detect rolling reboots, but it fixes the
false positives for rolling reboots we were seeing before.
BUG=chrome-os-partner:60449
BRANCH=none
TEST=manual
check the reset counter
turn off the AP
wait for cr50 to enter deep sleep
plug in suzyq
check it resumes from deep sleep and that the reset counter
still has the same value
Change-Id: Ie8490c29636403b409b2a3f0912a5b312d23bc24
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/418321
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Having cr50 resume on the falling edge of its uart rx signal is causing
some issues, and wake on low is good enough and works fine. This change
switches uart rx from DIO_WAKE_FALLING to DIO_WAKE_LOW
BUG=chrome-os-partner:60449
BRANCH=none
TEST=cr50 can still resume on uart activity and plugging in the charger
has no impact on cr50 remaining in deep sleep.
Change-Id: If77126cb64cf2fa949a75d53bb40098f037a2aa4
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/418335
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(Original CL: https://chromium-review.googlesource.com/#/c/411395/)
Enabling/Dislabling keyboard and touchpad is required to prevent EC
from waking up the system from S3 in tablet mode.
This change disables the keyboard and the trackpad when the lid goes
beyond 180 degree.
Keyboard and touchpad are also enabled/disabled by the tablet switch.
When the lid reaches 360 position, keyboard and touchpad are disabled.
And they stay disabled as long as the lid stays at 360 position.
This prevents keyboard and touchpad from turning on by the (faulty) lid
angle calculation.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I919f44bae4a13aa4d9e6072e96e46bb90c08ec22
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/417643
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
When the battery is fully charged or not charging, upon removal of
the AC, discharge takes long time. To overcome this issue suspend
the DC-DC converter when discharging on AC.
(Refers Reef CL:413153)
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Iebfcb95d0469be552283d17eb1aea0310eccbcb9
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/417428
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Apparently, one does not simply remove power from the trackpad and
restore it at will; the kernel needs to be involved and decide if the
device needs to be fully reinitialized, or if it was supposed to keep
some state. Therefore, let's not touch it except from startup and
shutdown and let the higher parts of the stack make the necessary
decisions.
BUG=chrome-os-partner:60478
BRANCH=gru
TEST=Boot in tablet mode and verify trackpad still works.
TEST=Go from clamshell to tablet mode and verify trackpad still works in
both modes.
Change-Id: I7674c5516ce4d237b0d2a15fb94b47e6fbe3ba39
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/417110
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
The new reef form-factor, Electro, has the lid accelerometer on the
reversed side. Undo the matrix setting.
BUG=chrome-os-partner:60477
BRANCH=reef
TEST=compile, check on reef the value are incorrect.
This reverts commit 430dd5e644.
Change-Id: I0a0efc89f0fad6cce3720836caf2c52bdb7e2b8d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416390
Tested-by: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
gru has circuitrythat selects the charge LED color based on the
frequency of the PWM.
By adjusting the PWM frequency instead of just the duty, we gain more
control over the brightness of the charge LED.
BUG=chrome-os-partner:54155
BRANCH=gru
TEST=activate each LED in turn and confirm color and brightness
Change-Id: Ie653125a528595c1ec68aea4d02cb70595a1b151
Signed-off-by: David Schneider <dnschneid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/415517
Reviewed-by: Shawn N <shawnn@chromium.org>
If battery is not present, input current is set to PD_MAX_CURRENT_MA.
If the input power set is greater than the maximum allowed system power,
system might get damaged. Hence, limit the input current to meet maximum
allowed input system power.
BUG=chrome-os-partner:58498
BRANCH=none
TEST=Manually tested on Reef. Removed the battery & using 'charger'
console command observed the following.
With Zinger charger at 20V - Input current is set to 2.25A
With Type-C & other chargers - Input current is set to 3A
Change-Id: Ife8686f322e095aa74b740a7c469bfe87107fb9a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/397865
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
The tablet mode value is set to 1 on each program start (RO power on
reset or any sysjump) in common tablet mode infrastructure. This
results in the tablet mode not ever reflecting current reality at the
beginning of each program. In addition to not being able to order
hook callbacks within a single hook it's the luck of the draw if
the tablet mode is set correctly if it was is being set within a
hook callback. With a lid accelerometer that doesn't work it
results in the input peripherals never being enabled.
To fix all this ensure the tablet mode state reflects the current
hardware input such that there's no ordering issues in addition to
making it reflect reality.
BUG=chrome-os-partner:60481
BRANCH=reef
TEST=With a machine whose accelerometer is unattached. Keyboard
and trackpad continue to work through suspend-resume, EC reboot,
etc.
Change-Id: I3456a7b578c9752344424721858756a33992a37d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416348
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
When a WAIT is received in response to a request, wait SinkRequestTime
before resending the request.
BUG=chrome-os-partner:34984
TEST=make -j buildall
BRANCH=none
Change-Id: I5c8429c4a7b9cf06609996f924b8d9d535ab6b5f
Reviewed-on: https://chromium-review.googlesource.com/414533
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Common code is more flexible and supports more parts, so delete the
npcx-only register translation code.
BUG=chrome-os-partner:60029
BRANCH=gru
TEST=Manual on gru, run 'flashrom -p ec --wp-enable' and check that 0x28
gets written to SR1, which matches our desired 'protect botton 128KB',
according to the datasheet. Also run 'flashrom -p ec --erase' then read
back EC SPI contents, verify ROM is erased except for first 128KB
region.
Change-Id: I526401997ff7ec77f2a6047a4a9af74a671ed69a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413228
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 43634d36d273887b1f2349c333a7b4b229a83365)
Reviewed-on: https://chromium-review.googlesource.com/415498
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
- Stop charging when thermal limits are violated.
- Don't start charging if battery percent is above 95% (but continue to
charge if we're already charging).
- Don't allow battery voltage to get too close (10mA) to BD9995X VBAT
setting. If battery voltage exceeds VBAT then back boosting may occur.
BUG=chrome-os-partner:56255
BRANCH=gru
TEST=Manual on kevin, insert charger with battery at 97%, verify battery
doesn't charge and reported current is 0. Discharge down to 95% and
insert charger, verify battery charges. Charge to 100%, verify battery
stops requesting current.
Change-Id: Icc5641e88bfad7d9d8ad4b6840338541fe7ba9a8
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403483
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/415494
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
When the EC is running in RO mode (ie for recovery), disable USB PD
communication (just use the type-C resistor to 5V/1.5A or 5V/3A)
in order to minimize the attack surface.
BUG=chrome-os-partner:49744
BRANCH=none
TEST=Manuel
In system.c, initialized static int force_locked to 1
> reboot ap-off
> chgsup
port=1, type=1, cur=3000mA, vtg=5000mV
Change-Id: I1b6bf302d235e9ba2f4c79250c02e97447d564c1
Reviewed-on: https://chromium-review.googlesource.com/391038
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit 360fbde14dd18e19878a3e0021dec537ecccba49)
Reviewed-on: https://chromium-review.googlesource.com/389691
Commit-Ready: Shawn N <shawnn@chromium.org>
This change adds support for signing SHA-384 & 512 hashes
when using PKCS#1 padding (CR50 does not support
SHA-384 & 512 at the moment, the actual hashing is to be
done on the host).
BRANCH=none
BUG=chrome-os-partner:59754
TEST=TCG tests pass
Change-Id: I78e774639a7968cbb50e58cdd0bf479e64123630
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/415218
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
On the bd9995*, back boosting may occur when actual battery voltage
drops below VBAT register setting. Maintain the VBAT register at the
battery-requested charge voltage even when not charging to ensure the
bd9995* doesn't become a back boosted animal.
BUG=chrome-os-partner:56139,chrome-os-partner:54248
BRANCH=gru
TEST=Manual on kevin, unplug AC, run 'charger', verify that 'V_batt' is
maintained at 8688 mV. Attach charger, verify 'V_batt' stays at 8688 mV
and device charges.
Change-Id: Ia0cc7f9279cb460e20a8faf332ad432067dc5482
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/400087
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Cr50 updates in development environment should allow resetting the
device immediately after update (without the need for SYS_RST_L to be
toggled).
This patch adds a vendor command to do just that.
BRANCH=none
BUG=chrome-os-partner:60013. chrome-os-partner:60321
TEST=none yet, with the rest of the patches applied the target gets
rebooted immediately after a cr50 code update. Also, observed
that flashing the console does not quite work, opend
crosbug.com/p/60321 to address this.
Change-Id: Ia6f99ad6d22004347ad02aac2cbf4dd6c5594928
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/414442
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When the battery is fully charged or not charging, upon removal of
the AC, discharge takes long time. To overcome this issue suspend
the DC-DC converter when discharging on AC.
BUG=chrome-os-partner:58969
BRANCH=none
TEST=Manually tested on reef. Discharge is in the permissible range.
'chgstate' console command prints correct values.
Change-Id: I64afa992e50b6e18daf43edf237fde8cf658a8a2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/413153
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This reverts commit c459c8278e
as the fix is not straightforwad, some host command codes in
private repos are expressed using C preprecessor which
breaks the assumption of this patch that all host commands
are expressed as four digit hex numbers.
Change-Id: I922de9ae8dbab6eef048463c5c09b1f338152083
Reviewed-on: https://chromium-review.googlesource.com/414492
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Because the virtual dev-mode switch is stored in the TPM, when we erase
the TPM memory prior to unlocking the Cr50 console on reboot the system
reinitializes itself in normal mode. This is by design (Chromebooks
should fail into a more-secure state when possible), but it can be
unexpected.
This adds some extra caution to the unlock warning message, so that
owners who are fiddling with it for the first time aren't unpleasantly
surprised by losing all their work.
BUG=chrome-os-partner:57407
BRANCH=none
TEST=make buildall; test on Reef
From the Cr50 console, run
lock on
lock off
Observe the new, scarier warning.
Change-Id: I6fd1248a5a4c131fa107a902a4539fa73f2308f6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/414387
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Use binary search in host command lookup dispatcher
BUG=chrome-os-partner:570895
TEST=manual testing on kevin
- Kevin boots
- ectool hello
make buildall -j
Verify *.smap hcmds section is sorted:
100bca94 R __hcmds
100bca94 R __host_cmd_0x0000
100bcaa0 R __host_cmd_0x0001
100bcaac R __host_cmd_0x0002
100bcab8 R __host_cmd_0x0003
100bcac4 R __host_cmd_0x0004
100bcad0 R __host_cmd_0x0005
100bcadc R __host_cmd_0x0006
100bcae8 R __host_cmd_0x0007
100bcaf4 R __host_cmd_0x0008
100bcb00 R __host_cmd_0x0009
100bcb0c R __host_cmd_0x000a
100bcb18 R __host_cmd_0x000b
100bcb24 R __host_cmd_0x000d
100bcb30 R __host_cmd_0x0010
100bcb3c R __host_cmd_0x0011
100bcb48 R __host_cmd_0x0012
100bcb54 R __host_cmd_0x0013
100bcb60 R __host_cmd_0x0015
100bcb6c R __host_cmd_0x0016
100bcb78 R __host_cmd_0x0017
100bcb84 R __host_cmd_0x0025
100bcb90 R __host_cmd_0x0026
100bcb9c R __host_cmd_0x0029
100bcba8 R __host_cmd_0x002a
100bcbb4 R __host_cmd_0x002b
100bcbc0 R __host_cmd_0x002c
100bcbcc R __host_cmd_0x0044
100bcbd8 R __host_cmd_0x0045
100bcbe4 R __host_cmd_0x0046
100bcbf0 R __host_cmd_0x0047
100bcbfc R __host_cmd_0x0061
100bcc08 R __host_cmd_0x0062
100bcc14 R __host_cmd_0x0064
100bcc20 R __host_cmd_0x0065
100bcc2c R __host_cmd_0x0067
100bcc38 R __host_cmd_0x0087
100bcc44 R __host_cmd_0x008c
100bcc50 R __host_cmd_0x008d
100bcc5c R __host_cmd_0x008f
100bcc68 R __host_cmd_0x0092
100bcc74 R __host_cmd_0x0093
100bcc80 R __host_cmd_0x0096
100bcc8c R __host_cmd_0x0097
100bcc98 R __host_cmd_0x0098
100bcca4 R __host_cmd_0x0099
100bccb0 R __host_cmd_0x009e
100bccbc R __host_cmd_0x00a0
100bccc8 R __host_cmd_0x00a1
100bccd4 R __host_cmd_0x00a8
100bcce0 R __host_cmd_0x00a9
100bccec R __host_cmd_0x00b6
100bccf8 R __host_cmd_0x00b7
100bcd04 R __host_cmd_0x00d2
100bcd10 R __host_cmd_0x00d3
100bcd1c R __host_cmd_0x00db
100bcd28 R __host_cmd_0x0101
100bcd34 R __host_cmd_0x0102
100bcd40 R __host_cmd_0x0103
100bcd4c R __host_cmd_0x0104
100bcd58 R __host_cmd_0x0110
100bcd64 R __host_cmd_0x0111
100bcd70 R __host_cmd_0x0112
100bcd7c R __host_cmd_0x0113
100bcd88 R __host_cmd_0x0114
100bcd94 R __host_cmd_0x0115
100bcda0 R __host_cmd_0x0116
100bcdac R __host_cmd_0x0117
100bcdb8 R __host_cmd_0x0118
100bcdc4 R __host_cmd_0x011a
100bcdd0 R __evt_src_EC_MKBP_EVENT_KEY_MATRIX
100bcdd0 R __hcmds_end
BRANCH=none
Change-Id: Ideb9951b318763f71915e2c4e5052f4b4bfab173
Reviewed-on: https://chromium-review.googlesource.com/405528
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch enables an interrupt handler for BMI160. This will improve
response time of the motion sense task.
BUG=None
BRANCH=none
TEST=Install and run AIDA64 from Playstore. Wiggle Reef DVT. Verify
'CrosEC Gyroscope' readings change.
Change-Id: Ie8dacb51795fa194840817d833cc6356beb01c8f
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413079
Mark host command structures as aligned for elm board.
Without marking as aligned, llvm was correctly complaining about
taking address of packed member.
util/ectool.c:1158 error: taking address of packed member 'size' of
class or structure 'ec_params_usb_pd_fw_update' may result in an
unaligned pointer value [-Werror,-Waddress-of-packed-member]
BRANCH=none
BUG=chromium:665240
TEST=Builds now
Change-Id: Ic4a2e81f6af8ef2a906d6ac7aca87ea6d00fe318
Reviewed-on: https://chromium-review.googlesource.com/413108
Commit-Ready: Manoj Gupta <manojgupta@chromium.org>
Tested-by: Manoj Gupta <manojgupta@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Enabling/Dislabling keyboard and touchpad is required to prevent EC
from waking up the system from S3 in tablet mode.
This change disables the keyboard and the trackpad when the lid goes
beyond 180 degree.
Keyboard and touchpad are also enabled/disabled by the tablet switch.
When the lid reaches 360 position, keyboard and touchpad are disabled.
And they stay disabled as long as the lid stays at 360 position.
This prevents keyboard and touchpad from turning on by the (faulty) lid
angle calculation.
BUG=chrome-os-partner:58792
BRANCH=none
TEST=Keyboard and trackpad are disabled when the lid goes beyond 180
and re-enabled when it's smaller than 180. Keyboard and trackpad are
disabled when the lid goes to 360 degree and the system doesn't wake
up by a keypress.
Change-Id: I48c04bd576f457a899dfdf9b4718d73b59419cbe
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/411395
Electro & Reef use the same board files but have different batteries
hence configure the respective battery parameters for these boards.
BUG=chrome-os-partner:59876
BRANCH=none
TEST=Manually tested on Reef. Boot with/without/battery works.
cut-off and boot from cut-off works.
Change-Id: I0e4684987133d6bcd9cabab5c5a1ce5b6c5684d2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411353
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The button closer to the hinge is assigned to volume down and
the one closer to the user is assigned to volume up. This change
swaps the GPIO assignments to fix the UX.
BUG=chrome-os-partner:60057
BRANCH=none
TEST=Verified the one closer to the hinge increases the volume and
the one closer to the user descreases the volume.
Change-Id: I3e716da288839c3f5be608fb2d63f277bbde1bc7
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412981
The pulldown on diob5 is used to detect when servo is detached. It is
unnecessary during deep sleep and when the EC console is active because
servo detection is disabled. Having the pull-down enabled during these
times can increase power consumption.
This change disables the pulldown when the EC console and deep sleep are
enabled. It also disables the diob5 input during deep sleep.
BUG=chrome-os-partner:60020
BRANCH=none
TEST=manual
Disconnect servo
Use the suzyq consoles to turn off the AP.
Enable deep sleep.
Measure the power consumed by vddiob and make sure it is around
0.3mW when the EC is in hibernate and when it is not.
Change-Id: I8a653c28800cfbeeb1b4b8598d166846124c6b53
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412940
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This returns the system information that is needed to determine the
correct signing keys for firmware updates.
BUG=chrome-os-partner:59747
BUG=chrome-os-partner:59705
BRANCH=none
TEST=make buildall; test on Reef
Run the "sysinfo" command on the Cr50 console:
> sysinfo
Reset flags: 0x00000800 (hard)
Chip: g cr50 B2
RO keyid: 0x3716ee6b(dev)
RW keyid: 0xb93d6539(dev)
DEV_ID: 0x017950ab 0x04656742
>
Send the raw command bytes from the Reef AP, observe the result:
# /tmp/trunks_send --raw 80 01 00 00 00 0C 20 00 00 00 00 12
80010000001C0000000000123716EE6BB93D6539017950AB04656742
#
The result contains the same information from the console command:
8001 TPM_ST_NO_SESSIONS
0000001C responseSize (28 bytes)
00000000 RC_SUCCESS
0012 vendor-specific subcommand
3716EE6B RO keyid
B93D6539 RW keyid
017950AB DEV_ID0
04656742 DEV_ID1
Change-Id: I82de3ebfb3e9be3b707583bc825d2efbcf851c5c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413106
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Cr50 has an internal pull down. This change changes the PULL_UP on KSO2
to a PULL_DOWN to match Cr50.
BUG=chrome-os-partner:60020
BRANCH=none
TEST=poweroff the AP, put the EC in hibernate, and verify when cr50
enters deep sleep it consumes around 0.6mW on vddiom.
Change-Id: I017094c185f616e018f121ac3ffb0521892aafa1
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412947
Reviewed-by: Shawn N <shawnn@chromium.org>
When the console is unlocked, the function nvmem_wipe_or_reboot()
is called. This holds the EC in reset, clears nvmem, resets the
TPM task, then releases the EC. Nothing about that should cause
the Cr50 to reboot, but it was happening anyway.
This CL addresses several subtle problems.
First, holding the EC in reset invoked the sys_rst_asserted()
interrupt handler, triggering extra (and early) calls to
tpm_reset(). That should wait until after nvmem is cleared, and
only be called once.
Second, the intentional call to tpm_reset() caused the current
(HOOKS) task to wait for the operation to finish, but it didn't
wait long enough (recreating the endorsement certs can take over
a second). When the task_wake_event() returned, a timeout was
indicated in addition to the completion event.
Third, because we checked for the timeout first, we reported an
error even though tpm_reset() completed successfully, just slower
than we expected. We didn't get the timeout event before it
completed because the TPM task runs at a higher priority.
This CL addresses all of these cases, and makes wiping nvmem the
responsibility of the TPM task as well, so that it can do it when it's
ready.
Note that the EC (and thus AP too) will be held in reset while nvmem is
erased.
BUG=chrome-os-partner:59902
BRANCH=none
TEST=make buildall, manual tests
From the Cr50 console, run the "lock on" and "lock off" commands.
Try it both with and without the battery present. Observe that
the Cr50 no longer reboots just because the console unlocks.
Change-Id: I65a342502718acc5b9bda8c6f28dcd27e8f027f7
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/411379
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Charger BGATE is off on POR hence the voltage to the battery pack is
not applied immediately from the VBUS. To overcome this issue, BGATE
is turned on (CHG_EN) at charger initialization. If the voltage across
VBATT is high but I2C is still failing, battery is booting from ship
mode hence overwrite the battery as not present till I2C on battery
is success and INIT bit is set.
BUG=chrome-os-partner:59308
BRANCH=none
TEST=Reef can boot to OS from shipmode battery.
Change-Id: If1b212612e27fd65a822675a9609f0a8c03d8add
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411360
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
When the battery charging is not allowed and charging at high load
audible noise is observed from the BD9995X charger. To prevent this
issue enable the battery-learn mode when battery charging is not
allowed.
This audible noise is related to the fact that in light load (<450mA
being withdrawn from VSYS) the DCDC of the charger operates
intermittently i.e. DCDC switches continuously and then stops to
regulate the output voltage and current, and sometimes to prevent
reverse current from flowing to the input. This causes a slight
voltage ripple on VSYS that falls in the audible noise frequency
(single digit kHz range). This small ripple generates audible noise
in the output ceramic capacitors (caps on VSYS and any input of DCDC
under VSYS).
BUG=chrome-os-partner:56695
BRANCH=none
TEST=When battery charging not allowed, battery is put in battery
learn-mode & audible noise is not observed.
Change-Id: Ia22779fe4cf70dd9dd4f799a9698264e44c4c7d2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/412382
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch changes the entry/exit model for S0ix from a PCH
SLP_S0 signal based model to a hybrid host event/direct interrupt
model. The kernel will send host events on kernel freeze/thaw exit;
EC will initiate the S0ix entry based on host command and exit via
another host command from kernel.
The assertion of SLP_S0 comes later than HC(suspend) and deasserion
of SLP_S0 comes earlier than HC(resume).
________ ________
SLP_S0 |______________________|
_____ ________
HC |___________________________|
BRANCH=none
BUG=chrome-os-partner:58740
TEST=Build/flash EC and check 'echo freeze > /sys/power/state'
command in OS shell. Verify idle state transitions during display off
and periodic wakes from S0ix do not lead to state transitions in EC.
Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/401072
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
