rev1 (Soraka) was using proto settings. Instead use the settings described
in fuel gauge specification.
BRANCH=none
BUG=b:62552007
TEST=On soraka, check that the system goes to ship mode and no error
messages appear, using "ectool batterycutoff" from OS or "cutoff"
from EC console.
Change-Id: I04e6b08265d20395d13e28e93cb14c1d49b376df
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/531736
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
In the FIDO U2F Authenticator Transports Extension, the list of
transports will be extended to:
FIDOU2FTransports ::= BIT STRING {
bluetoothRadio(0), -- Bluetooth Classic
bluetoothLowEnergyRadio(1),
uSB(2),
nFC(3),
uSBInternal(4)
}
Given our implementation is internal, update the value from bit(2) uSB
to bit(4) uSBInternal.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=cr50
BUG=b:35545754
TEST=with follow-up CLs, run U2FTest on Eve
and manually verify the individual attestation certificate
with an ASN.1 parser.
Change-Id: I62fe72ffed9b7eb34e31164fded46f458e5cbc16
Reviewed-on: https://chromium-review.googlesource.com/536775
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Implement system_get_chip_unique_id() for the g hardware.
It includes the hardware revision, the chip device id and
the read-only key id.
The key-id is included because this unique id is used as serial number
inside certificates and for security reason, we want a different id if
the RO has changed (e.g Node locked firmware).
The id is also 32-byte long for convenience reason when used for
certificates, but the high 16 bytes are currently zeros.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=cr50
BUG=b:35545754
TEST=dump the x.509 individual attestation certificate which includes
the unique id as serial number.
Change-Id: If24597d0de696d2700122d425724f14703fc5256
Reviewed-on: https://chromium-review.googlesource.com/536774
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
x25519 requires quite a bit more stack size (1696/2048), so
increase its size.
BRANCH=none
BUG=b:38486828
TEST=Flash hammer, ./usb_updater2 -c always reports the same
device public key, and authenticator is correct.
Change-Id: I51dff9f10167d654561ef7f199b9b9206511b7e9
Reviewed-on: https://chromium-review.googlesource.com/532476
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Mattias Nissler <mnissler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Handle UPDATE_EXTRA_CMD_PAIR_CHALLENGE command, where the
lid sends a random x25519 public key, and nonce, and the base
replies with its own (stable) x25519 public key, and computes
a shared secret using its private key to verify its identity.
BRANCH=none
BUG=b:38486828
TEST=Flash hammer, ./usb_updater2 -c always reports the same
device public key, and authenticator is correct.
Change-Id: Ida60ffa7476794ee92669951c740dbe35950fb9c
Reviewed-on: https://chromium-review.googlesource.com/532475
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In CL:503475, SERVO_TYPE is initialized *after* toad cable detection.
This make flash_ec failed to update plankton EC.
This CL adjust the timing of SERVO_TYPE detection, so toad cable
detection can work properly.
BUG=b:35648297
BRANCH=plankton
TEST=utils/flash_ec --board=plankton
Change-Id: I08a11b99109454096949b3ff64ed1c4d5f9891df
Reviewed-on: https://chromium-review.googlesource.com/535381
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Before this change, the current task id was cached in dcrypto_init() if
it hadn't already been called. This resulted in the task id of the first
caller to dcrypto_init() being cached until reset.
The cached task id was used when generating notifications that hardware
crypto operations were complete. This was fine as long as the task that
invoked dcrypto_init() was also the task that invoked dcrypto_call(). If
this wasn't the case, the task that invoked dcrypto_init() would be
notified of an event it wasn't expecting and the task that invoked
dcrypto_call() would not be notified and would time out.
This change locks a mutex and then caches the current task id in
dcrypto_call() before invoking the hardware operation so that the
correct task will be notified when the operation has completed.
BRANCH=none
BUG=none
TEST=make -j buildall
Change-Id: I30a920d85359cc990d77c88b1607bbe4cf674206
Reviewed-on: https://chromium-review.googlesource.com/522350
Commit-Ready: Carl Hamilton <carlh@chromium.org>
Tested-by: Marius Schilder <mschilder@chromium.org>
Tested-by: Carl Hamilton <carlh@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This change ensures that the power button pulse setting is saved and
restored across a sysjump. It uses the SYSJUMP_TAG "PB" (0x5042).
BUG=b:62445190
BRANCH=None
TEST=The condition mentioned in the bug could be reproduced using
following steps:
1. reboot on EC console
2. Use Vup/Vdn to select any option other than Power off.
3. Press power button
After step #3 above, device would shut down instead of selecting the
option. Verified that with this change, the device does not power off
anymore at step #3.
Change-Id: Icebe9c17d39a82fc3854dd75cc3a1dea032a234a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/533921
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
The contents of the board ID fields of the Cr50 image headers is an
important piece of information which determines if an image can run on
a particular H1 chip.
This patch adds this information to the output of the 'version'
command, printing both the contents of the fields of the RW images and
if the image would run with the current INFO1 board ID contents (Yes
or NO).
The board_id feature is in fact g chipset specific, this is why
board_id support files are being moved from the cr50 board scope to
the g chip scope.
BRANCH=cr50
BUG=b:35587387,b:35587053
TEST=observed expected output in the version command:
> bid
Board ID: 000000fa, flags 000000ff
> vers
Chip: g cr50 B2-C
Board: 0
RO_A: * 0.0.10/29d77172
RO_B: 0.0.10/c2a3f8f9
RW_A: * 0.0.20/DBG/cr50_v1.1.6542-856c3aff4
RW_B: 0.0.20/DBG/cr50_v1.1.6543-2c68a2630+
BID A: 00000000:00000000:00000000 Yes
BID B: 000000ea:0000fffc:000000ff No
Build: 0.0.20/DBG/cr50_v1.1.6542-856c3aff4
tpm2:v0.0.289-cb2de5a
cryptoc:v0.0.8-6283eee
2017-06-09 15:34:19 vbendeb@eskimo.mtv.corp.google.com
>
Change-Id: I5b283abf304a7408ca8f424407044fca238185e1
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/530033
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
By default, read USB serial number from flash, but provide a way
for boards to override the function (e.g., to read serial number
from unique chip id).
BRANCH=none
BUG=b:62280271
TEST=Flash hammer
lsusb -d 18d1:5022 -v -v | grep iSerial
shows different chip IDs on different boards.
Change-Id: I0917752bb8e04c1eff4dffc0b3714f63dcd942b0
Reviewed-on: https://chromium-review.googlesource.com/523045
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Using servo v4 with the captive CCD cable to flash an STM32 requires bit
banging mode to be enabled. This commit adds that support.
BUG=b:35648297
BRANCH=gru
TEST=Add support for rowan and flash rowan with no issues.
Change-Id: I6317d4acdd569888e20a1e298de7c8b620e94bb1
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/503476
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Not every servo has support for the same controls. For example, servo
micro doesn't have the JTAG buf on flex elements. This commit cleans up
the assumptions made and defines some variables which indicate which
controls are supported on a particular servo type. The servo type is
obtained by the "servo_type" control from servod.
BUG=b:35648297
BRANCH=gru
TEST=With some other patches, try and flash rowan with a servo v4.
Change-Id: Ie10f4f73028a01a81638e9114b48c88941b8bf93
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/503475
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Since Reef was the starting point for /board/coral, coral inherited
support for both the BMI150 magnetometer and BMI280 barometer
sensors. Coral does not need to support either of these sensors.
This CL removes support for both of these sensors.
BUG=b:62519010
BRANCH=none
TEST=Manual Run 'make BOARD=coral' and verify it builds. Used
accelinfo EC console command to verify that other sensor readings are
working. My test setup does not have ALS sensor so couldn't confirm
that operation.
Change-Id: I75abe2f10c8f0ff318f4795e6b88c9aff3d8a9ad
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/530448
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
All other chips rely on gpio_enable_interrupt to enable interrupts. They
aren't enabled by default. This changes chip/g to match that.
If chip/g boards have interrupts, they also enable them in the
init_interrupts function in board.c. Nothing needs to be added to enable
interrupts.
BUG=b:35587228
BRANCH=cr50
TEST=use 'gpiocfg' to verify the setup hasn't changed.
Change-Id: I1e975999e0174b9dcbbe63c09c6110dc4161f8ff
Reviewed-on: https://chromium-review.googlesource.com/530006
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Check that added entropy is at least somewhat acceptable.
BRANCH=none
BUG=b:38486828
TEST=make BOARD=hammer -j tests
./util/flash_ec --board=hammer --image=build/hammer/test-entropy.bin
EC console: runtest, get around 4000/1000 (=4) bits of entropy, value
matches (roughly) the value obtained using the awk script.
TEST=make run-entropy
Change-Id: I88d0e9ec0e38ab3ec70d3e8163b8ac1556df978d
Reviewed-on: https://chromium-review.googlesource.com/523482
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Coral has 16 voltage levels utilized for board ID. Compared to 8 for
Reef. This CL updates the board_version table to account for 16 board
version entries. In addition, insted of using a fixed error percentage
upper error bar, the table entries have been set to be the mid point
between two consecutive voltage levels.
MOdified the existing board_get_version() function so that it calls a
common function since this needs to be repeated for both board ID and
board SKUs. Modified gpio enable signal name to match the
schematic. Coral uses an active high enable.
Added an EC console command with options id|sku0|sku1 to test each
option. This CL does not include the function which will be used with
the host command interface so the AP can retrieve the sku 0|1 values.
BUG=b:62519010
BRANCH=none
TEST=MANUAL
Using the console command board_id shows the following:
> board_id
Wrong number of params
Usage: board_id <id | sku0 | sku1>
> board_id id
[44.484516 ID/SKU ADC 2 = 123 mV]
Board id|sku: chan 2 = 0
> board_id sku0
[56.850566 ID/SKU ADC 4 = 123 mV]
Board id|sku: chan 4 = 0
> board_id sku1
[65.547598 ID/SKU ADC 3 = 123 mV]
Board id|sku: chan 3 = 0
Change-Id: Iaba146c12c6d9d2c57973569d51c1b7ad3212455
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/530907
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Boards Rev1 and Rev2 will lose VBAT on power cycle and therefore
cannot successfully save the reset flag state.
Implement workaround that will allow these boards to continue to
work for FAFT testing by indicating to the skylake chipset power code
that it should skip the PMIC reset when doing 'reboot ap-off'.
BUG=b:62504451
BRANCH=None
TEST=Verified that "reboot ap-off" works fine on Rev1.
Change-Id: I97ee346c0e8796375dc295cfa7a86cd0d57d4e4f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/530515
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This patch makes a few changes to gpio.inc.
- When pre-initialize GPIOs, set default level to low:
ENTERING_RW and USB2_OTG_VBUSSENSE.
- Disable internal pull-up (not necessary if
output type is push-pull):
USB_Cx_5V_EN.
- Set output type to open-drain:
EN_USB_Cx_3A and USB_C0_CCx_VCONN_EN.
The USB_C0_CCx_VCONN_EN is externally pulled up to PP3300_PD_A.
The EN_USB_Cx_3A is pulled to EN_USB_Cx_5V_OUT and connected
to base of BJT directly. The output current will be huge
if it is set as push-pull.
BRANCH=none
BUG=none
TEST=1. built and booted on reef_it8320.
2. plug-in a device on one port and add load current
on vbus to check if current limit sit at 3A.
Change-Id: I71fec59cd1696fff417d9cddc287e993988aea33
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/528034
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This CL locks VCC_RST# alternative bit, NO_VCC1_RST, of DEVALTA
in case the developers switch it to GPO77 unexpectedly by setting
VCC1_RST_LK bit in DEV_CTL4.
BRANCH=none
BUG=none
TEST=Use rw console command to make sure NO_VCC1_RST bit is
locked on npcx7_evb.
Change-Id: Ic7882ef1c8050c3daca85bd241d5368f009e4e2e
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/522206
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In this CL, we add selecting LFCLK sources functionality for npcx7 ec
series. (Please notice not all of npcx7 ec series support this feature.)
Beside internal LFCLK source, ec also can choose the external 32kHz
crystal oscillator as LFCLK source for the specific application. We also
introduce a new definition, CONFIG_CLOCK_SRC_EXTERNAL, to switch this
feature in the board level driver.
This CL also adds:
1. LFCG register definitions in registers.h.
2. Change the order of each npcx modules by memory address.
BRANCH=none
BUG=none
TEST=Output LFCLK source through GPIO75. Compare with external 32kHz
crystal osc. on npcx7_evb and make sure the sources are the same.
Change-Id: I137146bf51ccb51266b9aac1e2e28bcea87dc4f5
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/520745
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Adds a mechanism that allows a board to disable interrupting the AP /
kernel when the status of any one of the EC_HOST_EVENTS included in
CONFIG_HOST_EVENT_REPORT_MASK changes state. Default state enables
reporting of all events; a board can override this by defining
CONFIG_HOST_EVENT_REPORT_MASK in its board.h file.
NOTE: The host_set_events() and host_clear_events() routines no longer
interrupt the AP if none of the host events the AP is interested in
changed state.
BRANCH=none
BUG=chromium:637061
TEST=make buildall passes
Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org>
Change-Id: I678fb9d9dab6890848b94b314efd711842b1fd48
Reviewed-on: https://chromium-review.googlesource.com/502078
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
When specifying board ID to program, it is convenient to be able to
specify the ID as a string, as reported by the RLZ stored in the VPD.
With this patch the first component of the board_id command line
option is considered a string if it is no longer than 4 bytes.
BRANCH=cr50
BUG=b:35587387,b:35587053
TEST=ran the following commands (interleaved with erasing INFO1 on the
target):
localhost ~ # usb_updater -s -i
Board ID space: ffffffff:ffffffff:ffffffff
localhost ~ # usb_updater -s -i ABCD
localhost ~ # usb_updater -s -i
Board ID space: 41424344:bebdbcbb:0000ff00
localhost ~ # usb_updater -s -i
Board ID space: ffffffff:ffffffff:ffffffff
localhost ~ # usb_updater -s -i 0x41424344:0x1234
localhost ~ # usb_updater -s -i
Board ID space: 41424344:bebdbcbb:00001234
localhost ~ # usb_updater -s -i
Board ID space: ffffffff:ffffffff:ffffffff
localhost ~ # usb_updater -s -i ABCD:0x1234
localhost ~ # usb_updater -s -i
Board ID space: 41424344:bebdbcbb:00001234
Change-Id: Ied8b240d60ea50f6fc8633f919ce4bc81ac17727
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/528440
Reviewed-by: Randall Spangler <rspangler@chromium.org>
poppy uses an ISL charger, which, unlike bd9995* charger based
systems, cannot provide an interrupt when VBUS falls below/rises
above a certain threshold.
On poppy rev2 onwards, we have a precise VBUS detection pin coming
from BC1.2 detection chip (PI3USB9281C), we a threshold between
3.1-3.7 V (3.5V typical) so we can use that to
enable discharge, according to this logic:
- When VBUS voltage falls below ~3.5V, and we're not sourcing 5V
to the port, enable discharge.
- When VBUS voltage rises above ~3.5V, disable discharge.
- When we source 5V to the port, disable discharge.
BRANCH=none
BUG=b:37525769
TEST=Charge out to device (Galaxy S8), and verify that VBUS
drops to 0.8V much faster than without this patch.
TEST=pd 0 swap power: 28ms (vs 496ms)
TEST=pd 1 swap power: 24ms to 0.875v, 202ms to 0.8v (vs 410ms)
TEST=Disconnect cable (port 0): 65ms (vs 721ms)
TEST=Disconnect cable (port 1): 13ms (vs 515ms)
Change-Id: Ibf2dcf5de31514fa0ce0ebd0c6db53d421a586fe
Reviewed-on: https://chromium-review.googlesource.com/481562
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Invoking signer with sudo is required only when signing requires a USB
fob. Let's not use it in unless necessary.
BRANCH=cr50
BUG=chromium:728751
TEST=verified that Cr50 build succeeds when both using and not using
the signing fob.
Change-Id: I8f40bd52f1752bfd88ec002f298b991faf7a2512
Reviewed-on: https://chromium-review.googlesource.com/528373
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
