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Add usb_i2c_board_is_enabled(). On Cr50, this is now also connected to the I2C CCD capability. The USB-I2C bridge can only be used when the capability is available. On other platforms (Servo V4, etc.) where usb_i2c_board_enable() is a no-op, add a dummy implementation which always returns true. See go/cr50-ccd-wp for more information. BUG=b:62537474 BRANCH=cr50 TEST=manual with CR50_DEV=1 Connect host PC to dev board USB port On host PC: sudo servod -c ccd_cr50.xml -c reef_r1_inas.xml dut-control pp3300_ec_shv_reg --> fail, error 0x8001 ccdoops --> reset I2C config ccd i2c disable --> I2C disabled On host PC: sudo servod -c ccd_cr50.xml -c reef_r1_inas.xml dut-control pp3300_ec_shv_reg --> fail, error 0x0006 ccd i2c enable --> I2C enabled ccdunlock --> I2C disabled ccdoops --> I2C enabled ccdset i2c unlesslocked ccdlock --> I2C disabled ccdunlock --> I2C enabled Change-Id: Ia3df32e239a5f7c5915bc6c7e408ce0dc8b26c89 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/590577 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
199 lines
5.0 KiB
C
199 lines
5.0 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Case Closed Debug interface
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*/
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#ifndef __CROS_EC_CASE_CLOSED_DEBUG_H
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#define __CROS_EC_CASE_CLOSED_DEBUG_H
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enum ccd_mode {
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/*
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* The disabled mode tri-states the DP and DN lines.
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*/
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CCD_MODE_DISABLED,
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/*
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* The partial mode allows some CCD functionality and is to be set
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* when the device is write protected and a CCD cable is detected.
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* This mode gives access to the APs console.
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*/
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CCD_MODE_PARTIAL,
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/*
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* The fully enabled mode is used in factory and test lab
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* configurations where it is acceptable to be able to reflash the
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* device over CCD.
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*/
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CCD_MODE_ENABLED,
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CCD_MODE_COUNT,
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};
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/*
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* Set current CCD mode, this function is idempotent.
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*/
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void ccd_set_mode(enum ccd_mode new_mode);
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/* Initialize the PHY based on CCD state */
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void ccd_phy_init(int enable_ccd);
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/*
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* Get current CCD mode.
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*/
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enum ccd_mode ccd_get_mode(void);
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/******************************************************************************/
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/* New CCD "V1" configuration. Eventually this will supersede the above code */
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/* Case-closed debugging state */
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enum ccd_state {
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CCD_STATE_LOCKED = 0,
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CCD_STATE_UNLOCKED,
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CCD_STATE_OPENED,
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/* Number of CCD states */
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CCD_STATE_COUNT
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};
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/* Flags */
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enum ccd_flag {
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/* Flags that can only be set internally; fill from bottom up */
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/*
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* Test lab mode is enabled. This MUST be in the first byte so that
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* it's in a constant position across all versions of CCD config.
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*
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* Note: This is used internally by CCD config. Do NOT test this
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* to control other things; use capabilities for those.
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*/
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CCD_FLAG_TEST_LAB = (1 << 0),
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/*
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* What state were we in when the password was set?
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* (0=opened, 1=unlocked)
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*/
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CCD_FLAG_PASSWORD_SET_WHEN_UNLOCKED = (1 << 1),
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/* (flags in the middle are unused) */
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/* Flags that can be set via ccd_set_flags(); fill from top down */
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/* Override write protect at boot */
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CCD_FLAG_OVERRIDE_WP_AT_BOOT = (1 << 22),
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/*
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* If overriding WP at boot, set it to what value
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* (0=disabled, 1=enabled)
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*/
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CCD_FLAG_OVERRIDE_WP_STATE_ENABLED = (1 << 23),
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};
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/* Capabilities */
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enum ccd_capability {
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/* AP and EC UART output and input */
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CCD_CAP_AP_UART_OUTPUT = 0,
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CCD_CAP_AP_UART_INPUT = 1,
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CCD_CAP_EC_UART_OUTPUT = 2,
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CCD_CAP_EC_UART_INPUT = 3,
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/* Access to AP SPI flash */
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CCD_CAP_AP_FLASH = 4,
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/* Access to EC flash (SPI or internal) */
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CCD_CAP_EC_FLASH = 5,
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/* Override WP temporarily or at boot */
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CCD_CAP_OVERRIDE_WP = 6,
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/* Reboot EC or AP */
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CCD_CAP_REBOOT_EC_AP = 7,
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/* Cr50 restricted console commands */
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CCD_CAP_CR50_RESTRICTED_CONSOLE = 8,
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/* Allow ccd-unlock or ccd-open without AP reboot */
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CCD_CAP_UNLOCK_WITHOUT_AP_REBOOT = 9,
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/* Allow ccd-unlock or ccd-open without short physical presence */
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CCD_CAP_UNLOCK_WITHOUT_SHORT_PP = 10,
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/* Allow ccd-open without wiping TPM data */
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CCD_CAP_OPEN_WITHOUT_TPM_WIPE = 11,
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/* Allow ccd-open without long physical presence */
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CCD_CAP_OPEN_WITHOUT_LONG_PP = 12,
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/* Allow removing the battery to bypass physical presence requirement */
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CCD_CAP_REMOVE_BATTERY_BYPASSES_PP = 13,
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/* Allow Cr50 firmware update without wiping TPM data */
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CCD_CAP_CR50_FW_UPDATE_WITHOUT_TPM_WIPE = 14,
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/* Access to I2C via USB */
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CCD_CAP_I2C = 15,
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/* Number of currently defined capabilities */
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CCD_CAP_COUNT
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};
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/**
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* Initialize CCD configuration at boot.
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*
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* This must be called before any command which gets/sets the configuration.
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*
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* @param state Initial case-closed debugging state. This should be
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* CCD_STATE_LOCKED unless this is a debug build, or if
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* a previous value is being restored after a low-power
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* resume.
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*/
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void ccd_config_init(enum ccd_state state);
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/**
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* Get a single CCD flag.
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*
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* @param flag Flag to get
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* @return 1 if flag is set, 0 if flag is clear
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*/
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int ccd_get_flag(enum ccd_flag flag);
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/**
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* Set a single CCD flag.
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*
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* @param flag Flag to set
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* @param value New value for flag (0=clear, non-zero=set)
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* @return EC_SUCCESS or non-zero error code.
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*/
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int ccd_set_flag(enum ccd_flag flag, int value);
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/**
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* Check if a CCD capability is enabled in the current CCD mode.
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*
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* @param cap Capability to check
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* @return 1 if capability is enabled, 0 if disabled
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*/
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int ccd_is_cap_enabled(enum ccd_capability cap);
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/**
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* Get the current CCD state.
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*
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* This is intended for use by the board if it needs to back up the CCD state
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* across low-power states and then restore it when calling ccd_config_init().
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* Do NOT use this to gate debug capabilities; use ccd_is_cap_enabled() or
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* ccd_get_flag() instead.
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*
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* @return The current CCD state.
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*/
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enum ccd_state ccd_get_state(void);
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/**
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* Force CCD disabled.
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*
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* This should be called if security checks fail and for some reason the board
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* can't immediately reboot. It locks CCD and disables all CCD capabilities
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* until reboot.
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*/
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void ccd_disable(void);
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#endif /* __CROS_EC_CASE_CLOSED_DEBUG_H */
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