mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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7d2b50f641
When the uart rx signal is not externally pulled high by the EC or AP, the low rx signal triggers thousands of uart interrupts. At initialization Cr50 does not know the state of those devices. If the uart is initialized when the device is off these interrupts may prevent Cr50 from booting on certain boards. This change does not enable the uart until the device state is know. When the device state monitoring detects that the AP or EC is powered on it will enable uart 1 or 2 and when it detects that it is powered off then the uart will be disabled. BUG=none BRANCH=none TEST=UART_CTRL registers are set to 0 for uart 1 and 2, and are changed to 3 when the device state is on. Change-Id: I43e847c6abb8507a86de92a5c226a79f3add7f97 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/360026 Reviewed-by: Scott Collyer <scollyer@chromium.org>
115 lines
2.0 KiB
C
115 lines
2.0 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "clock.h"
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#include "common.h"
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#include "gpio.h"
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#include "registers.h"
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#include "system.h"
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#include "task.h"
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#include "uart.h"
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#include "uartn.h"
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#include "util.h"
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static int done_uart_init_yet;
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#define USE_UART_INTERRUPTS (!(defined(CONFIG_CUSTOMIZED_RO) && \
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defined(SECTION_IS_RO)))
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#ifndef UARTN
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#define UARTN 0
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#endif
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int uart_init_done(void)
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{
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return done_uart_init_yet;
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}
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void uart_tx_start(void)
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{
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uartn_tx_start(UARTN);
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}
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void uart_tx_stop(void)
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{
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uartn_tx_stop(UARTN);
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}
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int uart_tx_in_progress(void)
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{
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return uartn_tx_in_progress(UARTN);
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}
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void uart_tx_flush(void)
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{
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uartn_tx_flush(UARTN);
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}
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int uart_tx_ready(void)
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{
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/* True if the TX buffer is not completely full */
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return uartn_tx_ready(UARTN);
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}
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int uart_rx_available(void)
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{
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/* True if the RX buffer is not completely empty. */
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return uartn_rx_available(UARTN);
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}
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void uart_write_char(char c)
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{
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uartn_write_char(UARTN, c);
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}
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int uart_read_char(void)
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{
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return uartn_read_char(UARTN);
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}
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#if USE_UART_INTERRUPTS
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/**
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* Interrupt handlers for UART0
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*/
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void uart_ec_tx_interrupt(void)
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{
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/* Clear transmit interrupt status */
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GR_UART_ISTATECLR(UARTN) = GC_UART_ISTATECLR_TX_MASK;
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/* Fill output FIFO */
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uart_process_output();
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}
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DECLARE_IRQ(GC_IRQNUM_UART0_TXINT, uart_ec_tx_interrupt, 1);
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void uart_ec_rx_interrupt(void)
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{
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/* Clear receive interrupt status */
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GR_UART_ISTATECLR(UARTN) = GC_UART_ISTATECLR_RX_MASK;
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/* Read input FIFO until empty */
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uart_process_input();
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}
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DECLARE_IRQ(GC_IRQNUM_UART0_RXINT, uart_ec_rx_interrupt, 1);
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#endif /* USE_UART_INTERRUPTS */
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void uart_init(void)
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{
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clock_enable_module(MODULE_UART, 1);
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/* Initialize the Cr50 UART */
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uartn_init(UARTN);
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uartn_enable(UARTN);
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#ifdef UART_AP
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uartn_init(UART_AP);
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#endif
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#ifdef UART_EC
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uartn_init(UART_EC);
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#endif
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done_uart_init_yet = 1;
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}
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