g: disable uart 1 and 2 during init

When the uart rx signal is not externally pulled high by the EC or AP,
the low rx signal triggers thousands of uart interrupts. At
initialization Cr50 does not know the state of those devices. If the
uart is initialized when the device is off these interrupts may prevent
Cr50 from booting on certain boards. This change does not enable the
uart until the device state is know. When the device state monitoring
detects that the AP or EC is powered on it will enable uart 1
or 2 and when it detects that it is powered off then the uart will be
disabled.

BUG=none
BRANCH=none
TEST=UART_CTRL registers are set to 0 for uart 1 and 2, and are changed
to 3 when the device state is on.

Change-Id: I43e847c6abb8507a86de92a5c226a79f3add7f97
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/360026
Reviewed-by: Scott Collyer <scollyer@chromium.org>

chip/g/uart.c

@@ -101,6 +101,7 @@ void uart_init(void)
 
 	/* Initialize the Cr50 UART */
 	uartn_init(UARTN);
+	uartn_enable(UARTN);
 
 #ifdef UART_AP
 	uartn_init(UART_AP);

chip/g/uartn.c

@@ -25,7 +25,6 @@ static struct uartn_interrupts interrupt[] = {
 	{GC_IRQNUM_UART2_TXINT, GC_IRQNUM_UART2_RXINT},
 };
 
-
 void uartn_tx_start(int uart)
 {
 	if (!uart_init_done())
@@ -144,12 +143,6 @@ void uartn_init(int uart)
 	 */
 	GR_UART_FIFO(uart) = 0x63;
 
-	/*
-	 * TX enable, RX enable, HW flow control disabled, no
-	 * loopback
-	 */
-	uartn_enable(uart);
-
 	/* enable RX interrupts in block */
 	/* Note: doesn't do anything unless turned on in NVIC */
 	GR_UART_ICTRL(uart) = 0x02;
@@ -158,5 +151,4 @@ void uartn_init(int uart)
 	/* Enable interrupts for UART */
 	uartn_enable_interrupt(uart);
 #endif
-
 }