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npcx: Clear IRQ11B bit when PM 1 is in enhanced mode

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The bit IRQ11B of register HIIRQC is meaningful only when PM Channel 1
is in PC87570-Compatible. In previous commit, we deprecate use of
PC87570 mode but set the bit unintentionally. This will not cause any
bug but may make confused when reading the code.

Modified sources:
1. lpc.c: CLear IRQ11B in register HIIRQC.

BUG=chrome-os-partner:34346
TEST=make buildall -j; verify on Wheatley
BRANCH=none
Signed-off-by: CHLin <CHLIN56@nuvoton.com>

Change-Id: I594222c29557add847a1f689859fdf558d64fdd3
Reviewed-on: https://chromium-review.googlesource.com/358536
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Amit Maoz <Amit.Maoz@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
CHLin
2016-07-07 16:11:51 +08:00
committed by chrome-bot
parent 5c0ec1cab8
commit 3cb77ee041
1 changed files with 1 additions and 1 deletions
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2
chip/npcx/lpc.c
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@@ -851,7 +851,7 @@ static void lpc_init(void)
*/
NPCX_HIPMCTL(PMC_ACPI) |= 0x83;
/* Normally Polarity IRQ1,12 type (level + high) setting */
NPCX_HIIRQC = 0x04;
NPCX_HIIRQC = 0x00;
/*
* Init PORT80