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a0f25e398e
In this CL, we add the following changes to support the CHIP_VARIANT npcx7m6xb and npcx7m7w: 1. Define the code RAM, data RAM, BBRAM base address/size. 2. Initialize the wov.c file for WoV driver development. (It will be compiled only when CHIP_VARIANT=npcx7m7w in the build.mk and CONFIG_WAKE_ON_VOICE is defined in board.h) 3. Fix the the incorrect offset of PWDWN_CTRL7 register. BRANCH=none BUG=none TEST=No build errors for make buildall. TEST=Change CHIP_VARIANT to npcx7m7w/npcx7m6xb in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be built. Flash the image on EVB; make sure EVB bootup. Change-Id: I87bccb9097f8f0a6c67f96a8d90adf201ae9e773 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/858637 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
70 lines
2.5 KiB
Makefile
70 lines
2.5 KiB
Makefile
# -*- makefile -*-
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# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# NPCX chip specific files build
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#
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# NPCX SoC has a Cortex-M4F ARM core
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CORE:=cortex-m
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# Allow the full Cortex-M4 instruction set
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CFLAGS_CPU+=-march=armv7e-m -mcpu=cortex-m4
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# Assign default CHIP_FAMILY as npcx5 for old boards used npcx5 series
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ifeq ($(CHIP_FAMILY),)
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CHIP_FAMILY:=npcx5
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endif
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# Required chip modules
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chip-y=header.o clock.o gpio.o hwtimer.o system.o uart.o
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chip-y+=system-$(CHIP_FAMILY).o
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# Optional chip modules
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chip-$(CONFIG_ADC)+=adc.o
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chip-$(CONFIG_FANS)+=fan.o
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chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o
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chip-$(CONFIG_I2C)+=i2c.o i2c-$(CHIP_FAMILY).o
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chip-$(CONFIG_LPC)+=lpc.o
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chip-$(CONFIG_ESPI)+=espi.o
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chip-$(CONFIG_PECI)+=peci.o
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chip-$(CONFIG_HOSTCMD_SPS)+=shi.o
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# pwm functions are implemented with the fan functions
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chip-$(CONFIG_PWM)+=pwm.o
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chip-$(CONFIG_SPI)+=spi.o
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chip-$(CONFIG_WATCHDOG)+=watchdog.o
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chip-$(HAS_TASK_KEYSCAN)+=keyboard_raw.o
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chip-$(CONFIG_WAKE_ON_VOICE)+=wov.o
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# spi monitor program fw for openocd and UUT(UART Update Tool)
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npcx-monitor-fw=chip/npcx/spiflashfw/npcx_monitor
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npcx-monitor-fw-bin=${out}/$(npcx-monitor-fw).bin
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PROJECT_EXTRA+=${npcx-monitor-fw-bin}
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# Monitor header is only used for UUT which is not supported on npcx5.
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ifneq "$(CHIP_FAMILY)" "npcx5"
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npcx-monitor-hdr=chip/npcx/spiflashfw/monitor_hdr
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npcx-monitor-hdr-ro-bin=${out}/$(npcx-monitor-hdr)_ro.bin
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npcx-monitor-hdr-rw-bin=${out}/$(npcx-monitor-hdr)_rw.bin
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PROJECT_EXTRA+=${npcx-monitor-hdr-ro-bin} ${npcx-monitor-hdr-rw-bin}
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endif
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# ECST tool is for filling the header used by booter of npcx EC
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show_esct_cmd=$(if $(V),,echo ' ECST ' $(subst $(out)/,,$@) ; )
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# ECST options for header
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bld_ecst=${out}/util/ecst -chip $(CHIP_VARIANT) -usearmrst -mode bt -ph -i $(1) -o $(2) -nohcrc \
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-nofcrc -flashsize 8 -spimaxclk 50 -spireadmode dual 1> /dev/null
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# Replace original one with the flat file including header
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moveflat=mv -f $(1) $(2)
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# Commands for ECST
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cmd_ecst=$(show_esct_cmd)$(call moveflat,$@,$@.tmp);$(call bld_ecst,$@.tmp,$@)
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# Commands to append npcx header in ec.RO.flat
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cmd_org_ec_elf_to_flat = $(OBJCOPY) --set-section-flags .roshared=share \
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-O binary $(patsubst %.flat,%.elf,$@) $@
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cmd_npcx_ro_elf_to_flat=$(cmd_org_ec_elf_to_flat);$(cmd_ecst)
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cmd_ec_elf_to_flat = $(if $(filter $(out)/RO/ec.RO.flat, $@), \
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$(cmd_npcx_ro_elf_to_flat), $(cmd_org_ec_elf_to_flat) )
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