Bill Richardson 096dec1adb Cr50: Change SYS_RST output to SYS_RST_L inout
This signal should be active low, not active high. In addition,
not only can we pull it low but so can other components. If
something else asserts it, we need to react.

This changes the polarity and sets up the interrupt handler. A
future CL will be needed to make the handler do something useful.

BUG=chrome-os-partner:52366
BRANCH=none
TEST=make buildall; test on Cr50

On the test board, short M0 to ground to trigger the interrupt.
Watch the input value with

  gpioget

You can drive the output (and trigger the interrupt) with

  gpioset SYS_RST_L_OUT 0
  gpioset SYS_RST_L_OUT 1

Change-Id: I3556963859601f43f990fc83f26d2cea919383c6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339214
Reviewed-by: Shawn N <shawnn@chromium.org>
2016-04-16 12:00:21 -07:00
2016-03-11 15:17:28 -08:00
2015-05-07 00:00:47 +00:00
2016-04-15 21:29:14 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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