Dino Li 2ea7b194d9 nds32: fix interrupt ...

1. To enable INT_PRI (hardware interrupt priority level 0~3)
   register, bit0@INT_CTRL = 0.
2. GIE need to be enabled before UART is initialized.
   [symptom]
   To define CONFIG_RWSIG / CONFIG_RSA / CONFIG_SHA256, then power on:
   after RW image is verified, firmware stuck in uart_flush_output().

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. bit0@INT_CTRL = 0.
     2. The RW image is verified and jump to image RW.

Change-Id: I393a3d5f87ea257885b872c91bfce43aecbaea8b
Reviewed-on: https://chromium-review.googlesource.com/309400
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>

2015-11-01 19:45:58 -08:00

..

cortex-m

system: Add support to reclaim space from loader.

2015-10-13 21:58:01 -07:00

cortex-m0

cleanup: Handle signed RW images a bit cleaner

2015-09-25 19:36:37 -07:00

host

host: mock i2c_xfer

2015-09-16 14:49:46 -07:00

nds32

nds32: fix interrupt

2015-11-01 19:45:58 -08:00