Shawn Nematbakhsh 1bdf8584bb npcx: flash: Use common code for SPI flash protect reg translation
Common code is more flexible and supports more parts, so delete the
npcx-only register translation code.

BUG=chrome-os-partner:60029
BRANCH=gru
TEST=Manual on gru, run 'flashrom -p ec --wp-enable' and check that 0x28
gets written to SR1, which matches our desired 'protect botton 128KB',
according to the datasheet. Also run 'flashrom -p ec --erase' then read
back EC SPI contents, verify ROM is erased except for first 128KB
region.

Change-Id: I526401997ff7ec77f2a6047a4a9af74a671ed69a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413228
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 43634d36d273887b1f2349c333a7b4b229a83365)
Reviewed-on: https://chromium-review.googlesource.com/415498
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
2016-12-01 19:59:09 -08:00
2016-11-10 21:28:33 -08:00
2016-12-01 19:58:56 -08:00
2016-11-20 00:24:27 -08:00
2016-09-09 19:20:12 -07:00
2012-05-11 09:11:52 -07:00
2016-10-14 16:05:49 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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