Vincent Palatin 0cde4cfec3 ensure the re-scheduling is not interrupted ...

The re-scheduling is protected by increasing our priority to -1,
according to ARMv-M architecture manual, we need an ISB after setting
the faultmask register to ensure that the new priority is visible.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)

Change-Id: Ia55859cf5c9101a09c61be7647a920126fc0a3b9

2012-03-14 22:34:35 +00:00

..

include

Sqrt function for Cortex-M

2012-02-16 05:43:29 +08:00

atomic.h

Move SoC-independant headers to another directory

2012-01-26 01:29:48 +00:00

build.mk

FPU control

2012-02-16 05:42:08 +08:00

cpu.h

NVIC registers are not SoC specific

2012-01-25 22:50:07 +00:00

ec.lds.S

update versioning information stored in the EC

2012-03-02 16:46:26 +00:00

fpu.c

Change TMP006 temperature calculation to use FP.

2012-02-15 16:34:54 -08:00

init.S

update versioning information stored in the EC

2012-03-02 16:46:26 +00:00

panic.S

Add configuration parameters for the panic UART code

2012-01-25 22:50:07 +00:00

switch.S

Add a trap for tasks which exit their task functions

2012-03-06 09:52:41 -08:00

task.c

ensure the re-scheduling is not interrupted

2012-03-14 22:34:35 +00:00

timer.c

Remove useless header includes

2012-01-26 01:32:30 +00:00