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OpenCellular/chip
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Kevin K Wong e83c06bf90 apollolake: ignore PLTRST# from SOC unless RSMRST# is deasserted 
add optional chipset specific function to check if PLTRST# is valid

BUG=chrome-os-partner:52656
BRANCH=none
TEST=make buildall, able to boot to OS on amenia

Change-Id: I7a2747c4f77f50393c3250c2ab0e1625e64e5a41
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/341732
Reviewed-by: Shawn N <shawnn@chromium.org>
2016-05-03 15:40:46 -07:00
..
g
Cr50: Enable jittery clock
2016-05-03 15:40:44 -07:00
host
UART: Remove enable/disable interrupt functions
2016-04-27 10:10:02 -07:00
it83xx
UART: Remove enable/disable interrupt functions
2016-04-27 10:10:02 -07:00
lm4
pwm: Add PWM_CONFIG_DSLEEP config flag
2016-04-27 23:58:04 -07:00
mec1322
pwm: Add PWM_CONFIG_DSLEEP config flag
2016-04-27 23:58:04 -07:00
npcx
apollolake: ignore PLTRST# from SOC unless RSMRST# is deasserted
2016-05-03 15:40:46 -07:00
nrf51
UART: Remove enable/disable interrupt functions
2016-04-27 10:10:02 -07:00
stm32
STM32: Add HSE and PLL to clock source selection
2016-04-29 07:34:52 -07:00