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372317af34b2def08bd22e7be1552402dd6e456f
While debugging reboot issue, it was difficult to get POST code from failing boards. Currently POST code is only accessible from EC console. Not all boards are fitted with servo board. This patch adds Port 80 history access from ectool. Reuse command code 0x48, EC_CMD_PORT80_LAST_BOOT with version 1. Signed-off-by: Wenkai Du <wenkai.du@intel.com> BUG=chrome-os-partner:28514 BRANCH=rambi TEST=manually test on rambi to confirm port 80 history match EC console Change-Id: If204d8fb457d8d8d18055f8282a406a35c03305e Reviewed-on: https://chromium-review.googlesource.com/198012 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Wenkai Du <wenkai.du@intel.com> Commit-Queue: Wenkai Du <wenkai.du@intel.com> Tested-by: Wenkai Du <wenkai.du@intel.com>
In the most general case, the flash layout looks something like this: +---------------------+ | Reserved for EC use | +---------------------+ +---------------------+ | Vblock B | +---------------------+ | RW firmware B | +---------------------+ +---------------------+ | Vblock A | +---------------------+ | RW firmware A | +---------------------+ +---------------------+ | FMAP | +---------------------+ | Public root key | +---------------------+ | Read-only firmware | +---------------------+ BIOS firmware (and kernel) put the vblock info at the start of each image where it's easy to find. The Blizzard EC expects the firmware vector table to come first, so we have to put the vblock at the end. This means we have to know where to look for it, but that's built into the FMAP and the RO firmware anyway, so that's not an issue. The RO firmware doesn't need a vblock of course, but it does need some reserved space for vboot-related things. Using SHA256/RSA4096, the vblock is 2468 bytes (0x9a4), while the public root key is 1064 bytes (0x428) and the current FMAP is 644 bytes (0x284). If we reserve 4K at the top of each FW image, that should give us plenty of room for vboot-related stuff.
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