Randall Spangler 66eec4415a baytrail: reduce delay before SYS_PWROK assertion to 5 ms ...

Since we have only mini-PCIe devices, and no PCIe devices, we don't need a 100 ms delay.

BUG=chrome-os-partner:25264
BRANCH=rambi
TEST=boot system; AP boots normally

Change-Id: I3dd537154d70b8379ebc36cb71474420cba43d7d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185046
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2014-02-06 19:27:14 +00:00

..

baytrail.c

baytrail: reduce delay before SYS_PWROK assertion to 5 ms

2014-02-06 19:27:14 +00:00

build.mk

x86 & tegra: add CONFIG_POWER_COMMON.

2014-01-21 01:13:15 +00:00

common.c

x86: generalize power state machine for all platforms (2/2)

2014-01-09 05:30:49 +00:00

gaia.c

x86: generalize power state machine for all platforms (2/2)

2014-01-09 05:30:49 +00:00

haswell.c

Fix leaving SUSP_VR_EN enabled if S5 rails fail to come up

2014-01-24 19:37:44 +00:00

ivybridge.c

x86: generalize power state machine for all platforms (2/2)

2014-01-09 05:30:49 +00:00

tegra.c

tegra: refactor the power state machine.

2014-01-17 18:17:09 +00:00