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Nico Huber 408204409b gma broxton: Start off with power domains and CDClk

It's close to the respective code for Skylake but still different
enough for a separate implementation. We start with a default CDClk
of 288MHz which is enough for resolutions up to 2560x1600.

Change-Id: I44364191236f421b2b89c9a019a50713f7c20525
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/18243
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

2017-06-03 15:22:31 +02:00

common

gma broxton: Start off with power domains and CDClk

2017-06-03 15:22:31 +02:00

configs

gma: Add config plus stubs for Broxton SoC

2017-06-03 15:19:33 +02:00

.gitignore

Initial upstream commit

2016-10-09 11:34:25 +02:00

COPYING

Initial upstream commit