Files
OpenCellular/chip/it83xx/flash_chip.h
Dino Li 0b1cea4aff nds32: enable GCC LTO
- We have more flash space to use with nds32 toolchain GCC6.3.0,
  so we enable a few console commands that were disabled previously.
  And we also enable LTO to reduce the size of FW image.

- Put "__wait_evt" function into ram_code section to
  fill the gap of flash and improving performance of code-fetch.

BUG=none
BRANCH=none
TEST=boot to kernel on reef_it8320.

Change-Id: I3b745ff80a57ef1163794864c39c22f7e1f86634
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/788712
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-30 07:09:47 -08:00

17 lines
519 B
C

/* Copyright 2017 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#ifndef __CROS_EC_FLASH_CHIP_H
#define __CROS_EC_FLASH_CHIP_H
/*
* This symbol is defined in linker script and used to provide the begin
* address of the ram code section. With this address, we can enable a ILM
* (4K bytes static code cache) for ram code section.
*/
extern const char __flash_dma_start;
#endif /* __CROS_EC_FLASH_CHIP_H */