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4f27014532
Observed task stack sizes growing, especially PD related. Adjust chip configuration for 64KB data. Use RAM size config items in flash layout config items. Update SPI image generator python script to not add a Boot-ROM header to EC_RW and add a test mode for debugging SPI read and hash calculations. BRANCH=none BUG= TEST=Build boards based on chip mchp. Check RO and RW EC binaries are correct size and located properly in ec.bin CQ-DEPEND=CL:1036258,CL:1053576 Change-Id: I12709a434d5aaa84fabe459176a3423365343308 Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1053948 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly