Mulin Chao 50fbfc5040 npcx: hwtimer: Add consecutive reading for ITCNT32
The mux for selecting source clock of ITIM will introduce a delay
and have a chance to make ITIM's source clock and core clock are
asynchronous. We need consecutive reading for ITCNT32 no matter source
clock is APB2 or 32k.

Modified sources:
1. hwtimer.c: Add consecutive reading for ITCNT32

BRANCH=none
BUG=chrome-os-partner:34346,chrome-os-partner:59240
TEST=No time stamp symptoms occur on wheatley for 30 hours.

Change-Id: I8b54e93b320e3ea74fc3d6ea13f0d178f9c449cd
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/412505
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2016-11-22 11:51:56 -08:00
2016-11-21 16:07:48 -08:00
2016-11-21 18:23:03 -08:00
2016-11-10 21:28:33 -08:00
2016-11-21 16:07:24 -08:00
2016-11-20 00:24:27 -08:00
2016-09-09 19:20:12 -07:00
2012-05-11 09:11:52 -07:00
2016-10-14 16:05:49 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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