Wei-Ning Huang 5f523464bb stm32: flash: enable data and instruction cache properly ...

The flash controller of STM32F4 and STM32L4 supports data and
instruction caching. Enable them properly.

BRANCH=none
BUG=b:38077127
TEST=on rose,
      > rw 0x40023c00
      read 0x40023c00 = 0x00000701

     Touch process loop is 5% faster.

Change-Id: Ibb28c0ed0c6a293547d5f0f7c6962f36fa417dd3
Signed-off-by: Wei-Ning Huang <wnhuang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/497230
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

2017-06-20 04:12:14 -07:00

..

g

g: upgrade_fw: limit updates after a hard reset

2017-06-19 15:33:13 -07:00

host

Revert "system: Shutdown AP before entering hibernate mode"

2017-04-21 06:03:57 -07:00

ish

Revert "system: Shutdown AP before entering hibernate mode"

2017-04-21 06:03:57 -07:00

it83xx

chip: it83xx: add support for floating point unit

2017-05-29 21:49:05 -07:00

lm4

Revert "system: Shutdown AP before entering hibernate mode"

2017-04-21 06:03:57 -07:00

mec1322

Revert "system: Shutdown AP before entering hibernate mode"

2017-04-21 06:03:57 -07:00

npcx

Fizz: Verify and jump to RW image

2017-06-19 21:03:30 -07:00

nrf51

Revert "system: Shutdown AP before entering hibernate mode"

2017-04-21 06:03:57 -07:00

stm32

stm32: flash: enable data and instruction cache properly

2017-06-20 04:12:14 -07:00