Shawn Nematbakhsh e6533d36a8 chell: pmic: Delay disable of V0.85A ...

Various voltage rails will be enabled / disabled by the PMIC when
GPIO_PMIC_SLP_SUS_L changes. We need to delay the disable of V0.85A
by approximately 25ms in order to allow V1.00A to sufficiently discharge
first.

BUG=chrome-os-partner:52047
TEST=Probe V1.00A and V0.85A during power-down, verify V1.00A discharges
faster than V0.85A.
BRANCH=glados

Change-Id: Ibbf4f989e1814e131dc373d2b5da9b6fa1ac9cce
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/337325
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-04-12 13:41:44 -07:00

..

apollolake.c

apollolake: initial chipset code

2016-03-31 21:35:56 -07:00

baytrail.c

power: Move EC_CMD_GSV_PAUSE_IN_S5 handler to common code

2015-05-07 17:25:40 +00:00

braswell.c

kunimitsu: hibernate: enable PseudoG3 support at board level

2016-02-18 17:35:16 -08:00

build.mk

apollolake: initial chipset code

2016-03-31 21:35:56 -07:00

common.c

kunimitsu: hibernate: enable PseudoG3 support at board level

2016-02-18 17:35:16 -08:00

ec_driven.c

ryu: add a dummy power module for controlling sensors.

2014-11-18 05:19:47 +00:00

gaia.c

gaia, mediatek, rockchip, tegra: No more disabling key scanning in power files

2016-02-18 13:29:36 -08:00

haswell.c

power: Move EC_CMD_GSV_PAUSE_IN_S5 handler to common code

2015-05-07 17:25:40 +00:00

mediatek.c

oak: make sure power button is stable when waiting for release

2016-03-16 06:43:25 -07:00

rk3399.c

power: rk3399: Add power down sequencing

2016-03-29 15:56:22 -07:00

rockchip.c

gaia, mediatek, rockchip, tegra: No more disabling key scanning in power files

2016-02-18 13:29:36 -08:00

skylake.c

chell: pmic: Delay disable of V0.85A

2016-04-12 13:41:44 -07:00

tegra.c

gaia, mediatek, rockchip, tegra: No more disabling key scanning in power files

2016-02-18 13:29:36 -08:00