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On PMIC reset, VCC power rail goes down thus resulting in loss of panic data. Thus, provide a chance to the chip to backup panic data if available. BUG=b:62076222 BRANCH=None TEST=make -j buildall 1. > crash divzero > panic === PROCESS EXCEPTION: 06 ====== xPSR: ffffffff === r0 : r1 : r2 : r3 : r4 :00000001 r5 :00000000 r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : Divide by 0 mmfs = 2000000, shcsr = 0, hfsr = 0, dfsr = 0 2. > crash assert > panic === PROCESS EXCEPTION: 00 ====== xPSR: ffffffff === r0 : r1 : r2 : r3 : r4 :dead6663 r5 :000000a4 r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : mmfs = 0, shcsr = 0, hfsr = 0, dfsr = 0 3. > crash watchdog > panic === PROCESS EXCEPTION: 3c ====== xPSR: ffffffff === r0 : r1 : r2 : r3 : r4 :dead6664 r5 :0000000a r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : mmfs = 0, shcsr = 0, hfsr = 0, dfsr = 0 4. > crash unaligned > panic === PROCESS EXCEPTION: 06 ====== xPSR: ffffffff === r0 : r1 : r2 : r3 : r4 :200c0d9e r5 :00000000 r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : Unaligned mmfs = 1000000, shcsr = 0, hfsr = 0, dfsr = 0 Change-Id: Ife5c9bbc12dcf6c4922f18b7530b21a3b87e65b3 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/530138
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly