Furquan Shaikh 78a407f0a1 npcx: Set ESPI_MAXFREQ based on FMCLK value
According to NPCX data sheets (NPCX5 and NPCX7), ESPI_MAXFREQ should
be decided based on the value of FMCLK. Since we are setting FMCLK to
30MHz on NPCX5, eSPI_MAXFREQ needs to be set to 33MHz.

This change sets ESPI_MAXFREQ_MAX depending upon the value of FMCLK.

BUG=b:73504527
BRANCH=fizz?
TEST=Verified that on soraka ESPI_MAXFREQ is set to 33MHz. Also, ran
some reboot tests to ensure that there is no regression in boot time.

Change-Id: Iaee89078741cf44c7ac232e2ee14d75384f68a35
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/925843
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2018-02-20 22:50:02 -08:00
2017-08-07 19:29:13 -07:00
2017-07-08 20:38:53 -07:00
2017-10-10 22:13:43 -07:00
2018-01-12 03:27:10 -08:00
2017-11-17 20:18:38 -08:00
2018-02-20 18:16:35 -08:00
2012-05-11 09:11:52 -07:00
2018-01-26 13:25:49 -08:00
2014-04-02 19:58:53 +00:00
2017-11-16 21:07:40 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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